The work described in this thesis aims to conduct a systematic study of the two stage turbocharging system to improve the Diesel engine transient performance as well as NOX and CO2 emissions with a focus on the improved turbocharger matching and the control of the charging system, through the use of high fidelity engine models backed by experimental results. To perform the analytical study, commercial 1D simulation software has been used in the process of system characterisation and control strategy design. To validate the analytical results, a two stage turbocharging system was installed on a production diesel engine and tested on a transient engine test bench. The test results were then used to further calibrate the 1D engine/turbocharger model. Several other technologies were also investigated in simulation to explore their potential to further improve the system. Unlike most studies in the literature, this project focused on the system benefit of the engine and turbochargers, instead of conducting optimisation solely at the component level. The engine global parameters, such as the engine fuel consumption, emission levels and the transient response were the main parameters to be considered and were also best suited to the strengths of the 1D simulation method. The interactive use of both the analytical and experimental methods was also a strong point of this study. A novel control strategy for the system was proposed and demonstrated in the simulation. Experiments confirmed the validity of this control strategy and provided data for further model calibration. The comparison of the test results of the baseline engine to those obtained with the two stage turbocharged engine system verified the benefits of the novel turbocharging arrangement and control scheme. Transient response (T1090) was improved, with a 50% faster torque rise at 1000 rpm; the fuel consumption over the NEDC was 4% lower and NOx emissions over the NEDC were 28% lower. In the meantime, the study also revealed shortcomings of the system, such as the lack of EGR control at low speed, low load condition and a mid-speed fuel consumption deterioration of 13% on average at 3000 rpm due to excessive back pressure. With a novel 1D model corroborated using test results, exploratory simulation was done to rectify the aforementioned shortcomings and to further improve the system. Simulation results showed that by implementing VGT and ball bearing technology in the high pressure stage of the two stage system, the EGR controllability at low speed was regained and the excessive back pressure at high speed was improved. Consequently, the fuel consumption was only increased by 1.3% compared to the baseline NEDC operation and the transient response was on par with the original two stage system, with only 0.05s slower in torque rise at 1000 rpm, and still 48% faster than the baseline VGT system. Furthermore, the NOx emission can be expected to be greatly improved in the upcoming more intensive drive cycles compared to the NEDC cycle, with simulation showing NEDC NOX emissions dropped by 1%, comparing to a substantial reduction of 11% in WLTC.

This thesis focuses on task sequencing and manpower scheduling to develop robust schedules for an aircraft manufacturer. The production of an aircraft goes through a series of multiple workstations, each consisting of a large number of interactive tasks and a limited number of working zones. The duration of each task varies from operator to operator, because most operations are performed manually. These factors limit the ability of managers to balance, optimize, and change the statement of work in each workstation. In addition, engineers spend considerable amount of time to manually develop schedules that may be incompatible with the changes in the production rate. To address the above problems, the current state of work centers are first analyzed. Then, several deterministic mathematical programming models are developed to minimize the total production labour cost for a target cycle time. The mathematical models seek to find optimal schedules by eliminating and/or considering the effect of overtime on the production cost. The resulting schedules decrease the required number of operators by 16% and reduce production cycle time of work centers by 53% to 67%. Using these models, the time needed to develop a schedule is reduced from 36 days to less than a day. To handle the stochasticity of the task durations, a two-stage stochastic programming model is developed to minimize the total production labour cost and to find the number of operators that are able to work under every scenario. The solution of the two-stage stochastic programming model finds the same number of operators as that of the deterministic models, but reduces the time to adjust production schedules by 88%.

Since long ago, the whole performance of the Taiwan¡¬s airports presents the growth tendency besides the Cargo tonnes, the passengers and aircraft movements all present the decline tendency. Compares airport extension project which Taiwan continues to carry on every year, this is implying the performance of the Taiwan¡¬s airports presents bad. This research from 2003 to 2005 the Taiwan¡¬s 18 airports as the object of study, used Two-Stage DEA to do for the main methodology, and auxiliary by Malmquist index, Mann-Whitney test, and the Kruskal-Wallis test, carried on the performance measurement of the Taiwan¡¬s airports. This research divided the airport production process into two stages (include the production interface and the sales interface), so as to set an integral model. According to the analysis, the findings showed that the Taiwan¡¬s airports, had good performance, included C.K.S. international airport, Taipei Songshan airport, Magong airport, Chiayi airport, and Kinmen airport; the Taiwan¡¬s airports, presented the growth tendency from 2003 to 2005, included C.K.S. international airport, Tainan airport, Magong airport, Nangan airport, and Lanyu airport. The site characteristics, including airport class, the airport nature, the airport position, and airport location, have the significance influence regarding the performance of the Taiwan¡¬s airports.

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This thesis describes the development of a new generation of three-phase rectifier, used to power telecommunications equipment. The traditional topology for such power converters is a single-phase two-stage design, with a boost converter providing power factor correction at the input to the first stage and an isolated dc-dc converter making up the second stage. A two-stage design results in the output power being processed twice and this cascade effect results in an overall reduction in efficiency. A rectifier solution is sought that meets with all the requirements of the telecommunications industry, while not displaying the inherent weaknesses associated with a boost-derived topology, and which can be realised in a single-stage design. A number of common three-phase topologies exist that could be realised as telecommunication power supplies, however, they do not completely satisfy all the industry requirements. A new three-phase rectifier, which is a single-stage buck-derived topology, is proposed. As a consequence of incorporating a buck-derived topology, the three-phase rectifier does not exhibit any issues resulting from startup inrush currents, or high currents due to an output short circuit condition, as would result in a boost-derived topology. The new proposed rectifier is modular in nature, which has the added benefit of redundancy. As a result of the new three-phase rectifier having a single-stage topology, it is expected that the overall efficiency would able to reach close to 95%. This is due to the traditional two-stage designs having efficiencies around the 90% mark, and therefore by removing a stage, out of the power conversion process the overall losses would also be halved, resulting in the 5% gain in efficiency. The rectifier system requires only one controller as a result of being a single-stage design, thus also reducing the overall system cost. Simulations show that if this topology is combined with a three-phase phase-locked loop controller it can meet the industry compliance standards. The thesis follows the development of the three-phase power converter from the simulation stage to the realisation of the control hardware and stability modelling. It also provides a detailed report of an investigation into the power converter system’s performance. The thesis concludes with discussions concerning the viability of the new topology as a commercial product and indicates areas of possible future research and development.

This thesis focuses on task sequencing and manpower scheduling to develop robust schedules for an aircraft manufacturer. The production of an aircraft goes through a series of multiple workstations, each consisting of a large number of interactive tasks and a limited number of working zones. The duration of each task varies from operator to operator, because most operations are performed manually. These factors limit the ability of managers to balance, optimize, and change the statement of work in each workstation. In addition, engineers spend considerable amount of time to manually develop schedules that may be incompatible with the changes in the production rate. To address the above problems, the current state of work centers are first analyzed. Then, several deterministic mathematical programming models are developed to minimize the total production labour cost for a target cycle time. The mathematical models seek to find optimal schedules by eliminating and/or considering the effect of overtime on the production cost. The resulting schedules decrease the required number of operators by 16% and reduce production cycle time of work centers by 53% to 67%. Using these models, the time needed to develop a schedule is reduced from 36 days to less than a day. To handle the stochasticity of the task durations, a two-stage stochastic programming model is developed to minimize the total production labour cost and to find the number of operators that are able to work under every scenario. The solution of the two-stage stochastic programming model finds the same number of operators as that of the deterministic models, but reduces the time to adjust production schedules by 88%.

The purpose of this study is to analyze the behavior of a reversible two-cylinder refrigerant compressor manufactured by Bristol Compressor Incorporated. This compressor contains a specialized linkage that causes the compressor to transition from a two-cylinder compressor to a single-cylinder compressor when the direction of rotation of the crankshaft is reversed. The linkage accomplishes this by reducing the throw of one cylinder to zero. Of interest are the conditions to which this linkage is subjected when the direction of rotation is again reversed, causing the compressor to return to its two-cylinder functioning. When this reversal takes place, a collision occurs within the linkage. These repeated collisions are thought to be the cause of fatigue failure of the linkage in many of these compressors. To verify that this collision is the problem, an understanding of the stress state during the collision is needed. This thesis begins the work necessary to determine the dynamic stress state present within the system. A FORTRAN program was developed that modeled the kinematic behavior of the system under operating conditions. The program predicts the accelerations, velocities, positions, and internal forces present within the system during startup conditions. Also, a method has been developed to model rotary sliding contact between two cylindrical surfaces. This method is developed and investigated in hopes that it will facilitate the modeling of the behavior of the compressor linkage in a dynamic finite element analysis. / Master of Science

This dissertation examines the Split Delivery Vehicle Routing Problem (SDVRP), a relaxed version of classical capacitated vehicle routing problem (CVRP) in which the demand of any client can be split among the vehicles that visit it. We study both scenarios of the SDVRP in this dissertation. For the SDVRP with a fixed number of the vehicles, we provide a Two-Stage algorithm. This approach is a cutting-plane based exact method called Two-Stage algorithm in which the SDVRP is decomposed into two stages of clustering and routing. At the first stage, an assignment problem is solved to obtain some clusters that cover all demand points and get the lower bound for the whole problem; at the second stage, the minimal travel distance of each cluster is calculated as a traditional Traveling Salesman Problem (TSP), and the upper bound is obtained. Adding the information obtained from the second stage as new cuts into the first stage, we solve the first one again. This procedure stops when there are no new cuts to be created from the second stage. Several valid inequalities have been developed for the first stage to increase the computational speed. A valid inequality is developed to completely solve the problem caused by the index of vehicles. Another strong valid inequality is created to provide a valid distance lower bound for each set of demand points. This algorithm can significantly outperform other exact approaches for the SDVRP in the literature. If the number of the vehicles in the SDVRP is a variable, we present a column generation based branch and price algorithm. First, a restricted master problem (RMP) is presented, which is composed of a finite set of feasible routes. Solving the linear relaxation of the RMP, values of dual variables are thus obtained and passed to the sub-problem, the pricing problem, to generate a new column to enter the base of the RMP and solve the new RMP again. This procedure repeats until the objective function value of the pricing problem is greater than or equal to zero (for minimum problem). In order to get the integer feasible (optimal) solution, a branch and bound algorithm is then performed. Since after branching, it is not guaranteed that the possible favorable column will appear in the master problem. Therefore, the column generation is performed again in each node after branching. The computational results indicate this approach is promising in solving the SDVRP in which the number of the vehicles is not fixed.

It is perceived that Moore's Law will prevail at least for the next decade, with continuous advancements of processing technologies for very-large-scale integrated (VLSI) circuits. Nano technology is driving VLSI circuits in a path of greater transistor integration, faster clock frequency, and lower operation voltage. This has imposed a new challenge for delivering high- quality power to modern processors. Power management technology is critical for transferring the required high current in a highly efficient way, and accurately regulating the sub-1V voltage in very fast dynamic transient response conditions. Furthermore, the VRs are limited in a given area and the power density is important to save the precious real estate of the motherboard. Based on the power delivery path model, the analysis results show that as long as the bandwidth can reach around 350 kHz, the bulk capacitor of the VR can be completely eliminated, which means significant savings in cost and real estate. Analysis also indicates that 650kHz bandwidth can reduce the number of the decoupling capacitor from 230 to 50 for future microprocessor case. Beyond 650kHz, the reduction is not obvious any more due to the parasitic components along the power delivery path. Following the vision of high bandwidth, the VRs need to operate at much higher frequency than today's practice. Unfortunately, the multiphase buck converter cannot benefit from it due to the low efficiency at high switching frequency. The extreme duty is the bottleneck. The extreme duty cycle increases VR switching loss, reverse recovery loss, and conduction loss; therefore makes the 12V-input VR efficiency drop a good deal when compared with 5V-input VR efficiency. Two-stage approach is proposed in this dissertation to solve this issue. The analysis shows that the two-stage conversion has much better high frequency capability than the conventional single stage VRs. Based on today's commercial devices, 2-MHz is realized by the hardware and 350kHz bandwidth is achieved to eliminate the output bulk capacitors. Further improvement based on future devices and several proposed methods of reducing switching loss and body diode loss can push the switching frequency up to 4MHz while maintaining good efficiency. Such a high frequency makes the high bandwidth design (650kHz) feasible. Hence, the output capacitance can be significantly reduced to save cost and real estate. The two-stage concept is also effective in laptop computer and 48V DPS applications. It has been experimentally proved that two-stage VR is able to achieve higher switching frequency than single stage not only at full load condition but also at light load condition by the proposed ABVP and AFP concept based on two-stage configuration. These unique control strategies make the two-stage approach even more attractive. As the two-stage approach is applied to 48V DPS applications, such as telecommunication system and server systems, more efficient and higher power density power supply can be achieved while greatly cut down the cost. Therefore, after the two-stage approach is proposed, it has been widely adopted by the industry. In order to further reduce the output capacitance, the power architecture of computer needs to be modified. Based on two-stage approach, one possible solution is to move the second stage VR up to the OLGA board. Based on this structure, the parasitics can be dramatically reduced and the number of the cavity capacitor is reduced from 50 to 14. By reducing ESL of the capacitor, the output capacitance could be further reduced. After that and based on two-stage approach again, VR+LR structure is discussed, which provides the opportunity to reduce the output capacitance and integrate the power supply with CPU. The feasibility is studied in this dissertation from both power loss reduction and output capacitance reduction perspectives. Experimental results prove that LR can significantly reduce the voltage spike while minimizing the output capacitance. As a conclusion, the two-stage approach is a promising solution for powering future processors. It is widely effective in computer and communication systems. Far beyond that, it provides a feasible platform for new architectures to power the future microprocessors. / Ph. D.

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