The volume reduction in power converters over the past several decades can chiefly be attributed to increases in switching frequency. It is to be expected that the trends towards miniaturization will maintain steady pressure to keep this pace of increasing switching frequencies of power converters. However certain fundamental limits in high frequency power conversion are being reached as frequencies are being pushed deeper into the megahertz range, inhibiting substantial further increases. The work reported in this dissertation is intended to systematically investigate the fundamental frequency limitations, identify some of the solutions for HF/VHF power conversion and to provide guidelines and tools to optimize the performance of power converters by maximizing frequency. A number of multi-megahertz power converters are examined to evaluate the present status and future trend of HF/VHF power conversion. An interesting trend between power level and frequency is observed. A general limitation about the power level and frequency, independent of design details, is derived from the physics of the semiconductor devices, which determines the upper bound of the power levels as frequency increases. A 250 MHz DC-DC power converter (derived from the Class E power amplifier) is analyzed and demonstrated with discrete components, which again verifies the trend between power level and frequency. The power losses in the semiconductor devices are discussed, and optimization criteria for minimizing the power losses of the devices, are discussed. By relating the power losses to the semiconductor materials' properties, a methodology for selecting proper materials is identified for high frequency and high efficiency power conversion. The frequency scaling effects of passive components, still dominating the volume of the modern power converter, is analyzed. A generic multi-disciplinary methodology is developed to analyze and maximize frequency and performance of passive components in terms of power density and efficiency. It is demonstrated how the optimum frequency can be identified, and how power conversion efficiency deteriorates beyond this optimum under a fixed maximum temperature. Power loss measurement is becoming more challenging as higher frequency and higher efficiency power conversion. To achieve an accurate power loss measurement in a high frequency, high efficiency power electronics system or component, limitations of electrical measurement are identified, and various calorimetric methods are surveyed. Calorimetric methods are more accurate due to the direct heat loss measurement. An advanced calorimetric system is proposed, analyzed, and tested, demonstrating about 5% error in total losses up to 25W. / Ph. D.

This study explored the evolution of Denton's VHF educational television assignment Channel 2, from its inception on April 14, 1952, to September 2, 1977. The problem was to discern why the channel remained inactive for twenty-five years. Chapters explore the attempts of broadcast interests to acquire control of the channel, and discuss why they were unsuccessful. The study concludes that a lack of finances, combined with the apathy and self-interests of Denton's educational leaders, prevented the channel's utilization. Federal Communications Commission policy allowed Denton's educators more time to raise money for a Denton station. Other conclusions suggest that the channel not be reassigned and that it be activated.

This Master’s thesis deals with investigation of high-frequency oscillations in intracranial electroencephalography in patients with pharmacoresistant epilepsy. It describes individual types of oscillations with respect to their frequency definition, examines their physiological differences and occurrence. In addition to conventional high-frequency oscillations (up to about 600 Hz), it also focuses on oscillations with a frequency component above 1kHz. According to recent studies, these oscillations could have higherspecificity for the determination of pathological tissue in the epileptic brain. The data for this work was obtained by manual labeling and categorization of approximately 1500 sections of the stereoencephalographic record signals of patients undergoing surgical removal of the epileptic foci and subsequently monitored for success in the operation. Differences between individual groups of oscillations and resected or unresected tissues are investigated in this work by methods using calculations of entropy signals or cross frequency coupling. The most significant results were achieved for the classification group (FR + vFR) vs. uFR, methods frequency-amplitude coupling and sample entropy 1. When categorizing according to information about channel resection, the Shannon entropy is the most successful classification parameter.

Point-of-load (POL) converters are used extensively in IT products. Every piece of the integrated circuit (IC) is powered by a point-of-load (POL) converter, where the proximity of the power supply to the load is very critical in terms of transient performance and efficiency. A compact POL converter with high power density is desired because of current trends toward reducing the size and increasing functionalities of all forms of IT products and portable electronics. To improve the power density, a 3D integrated POL module has been successfully demonstrated at the Center for Power Electronic Systems (CPES) at Virginia Tech. While some challenges still need to be addressed, this research begins by improving the 3D integrated POL module with a reduced DCR for higher efficiency, the vertical module design for a smaller footprint occupation, and the hybrid core structure for non-linear inductance control. Moreover, as an important category of the POL converter, the voltage regulator (VR) serves an important role in powering processors in today's electronics. The multi-core processors are widely used in almost all kinds of CPUs, ranging from the big servers in data centers to the small smartphones in almost everyone's pocket. When powering multiple processor cores, the energy consumption can be reduced dramatically if the supply voltage can be modulated rapidly based on the power demand of each core by dynamic voltage and frequency scaling (DVFS). However, traditional discrete voltage regulators (VRs) are not able to realize the full potential of DVFS since they are not able to modulate the supply voltage fast enough due to their relatively low switching frequency and the high parasitic interconnect impedance between the VRs and the processors. With these discrete VRs, DVFS has only been applied at a coarse timescale, which can scale voltage levels only in tens of microseconds (which is normally called a coarse-grained DVFS). In order to get the full benefit of DVFS, a concept of an integrated voltage regulator (IVR) is proposed to allow fine-grained DVFS to scale voltage levels in less than a microsecond. Significant interest from both academia and industry has been drawn to IVR research. Recently, Intel has implemented two generations of very high frequency IVR. The first generation is implemented in Haswell processors, where air core inductors are integrated in the processor's packaging substrate and placed very closely to the processor die. The air core inductors have very limited ability in confining the high frequency magnetic flux noise generated by the very high switching frequency of 140MHz. In the second generation IVR in Broadwell processors, the inductors are moved away from the processor substrate to the 3DL PCB modules in the motherboard level under the die. Besides computers, small portable electronics such as smartphones are another application that can be greatly helped by IVRs. The smartphone market size is now larger than 400 billion US dollars, and its power consumption is becoming higher and higher as the functionality of smartphones continuously advances. Today's multi-phase VR for smartphone processors is built with a power management integrated circuit (PMIC) with discrete inductors. Today's smartphone VRs operate at 2-8MHz, but the discrete inductor is still bulky, and the VR is not close enough to the processor to support fine-grained DVFS. If the IVR solution can be extended to the smartphone platform, not only can the battery life be greatly improved, but the total power consumption of the smartphone (and associated charging time and charging safety issues) can also be significantly reduced. Intel's IVR may be a viable solution for computing applications, but the air core inductor with un-confined high-frequency magnetic flux would cause very severe problems for smartphones, which have even less of a space budget. This work proposes a three-dimensional (3D) integrated voltage regulator (IVR) structure for smartphone platforms. The proposed 3D IVR will operate with a frequency of tens of MHz. Instead of using an air core, a high-frequency magnetic core without an air gap is applied to confine the very high frequency flux. The inductor is designed with an ultra-low profile and a small footprint to fit the stringent space requirement of smartphones. A major challenge in the development of the very high frequency IVR inductor is to accurately characterize and compare magnetic materials in the tens of MHz frequency range. Despite the many existing works in this area, the reported measured properties of the magnetics are still very limited and indirect. In regards to permeability, although its value at different frequencies is often reported, its saturation property in real DC-biased working conditions still lacks investigation. In terms of loss property, the previous works usually show the equivalent resistance value only, which is usually measured with small-signal excitation from an impedance/network analyzer and is not able to represent the real magnetic core loss under large-signal excitation in working conditions. The lack of magnetic properties in real working conditions in previous works is due to the significant challenges in the magnetic characterization technique at very high frequencies, and it is a major obstacle to accurately designing and testing the IVR inductors. In this research, an advanced core loss measurement method is proposed for very high frequency (tens of MHz) magnetic characterization for the IVR inductor design. The issues of and solutions for the permeability and loss measurement are demonstrated. The LTCC and NEC flake materials are characterized and compared up to 40MHz for IVR application. Based on the characterized material properties, both single-phase and multi-phase integrated inductor are designed, fabricated and experimentally tested in 20MHz buck converters, featuring a simple single-via winding structure, small size, ultra-low profile, ultra-low DCR, high current-handling ability, air-gap-free magnetics, multi-phase integration within one magnetic core, and lateral non-uniform flux distribution. It is found that the magnetic core operates at unusually high core loss density, while it is thermally manageable. The PCB copper can effectively dissipate inductor heat with 3D integration. In addition, new GaN device drivers and magnetic materials are evaluated and demonstrated with the ability to increase the IVR frequency to 30MHz and realize a higher density with a smaller loss. In summary, this research starts with improving the 3D integrated POL module, and then explores the use of the 3D integration technique along with the very high frequency IVR concept to power the smartphone processor. The challenges in a very high frequency magnetic characterization are addressed with a novel core loss measurement method capable of 40MHz loss characterization. The very high frequency multi-phase inductor integrated within one magnetic component is designed and demonstrated for the first time. A 20MHz IVR platform is built and the feasibility of the concept is experimentally verified. Finally, new GaN device drivers and magnetic materials are evaluated and demonstrated with the ability to increase the IVR frequency to 30MHz and realize higher density with smaller loss. / Ph. D. / This research focuses on reducing the size, footprint, and power loss of the power supply for the CPUs in different applications, ranging from the big servers in data centers to the small smartphones in almost everyone’s pocket. To achieve this goal, novel characterization, design, and integration technique is developed, especially for the bulky magnetic components, with much faster (~10X) switching speed than the nowadays practice. This research opens the door to the development of the next generation of CPUs’ power supply with very high switching speed, simple structure, high integration level, and high current handling ability.

Thesis (MScEng)--Stellenbosch University, 2011. / ENGLISH ABSTRACT: A well-known problem with FM-CW radar systems is the leakage of transmitter power into the receiver which leads to the making of close-in targets, and can severely limit the system dynamic range performance. This thesis considers two solutions to this radar system problem for a low frequency radar operating in the VHF band. The first method to suppress coupling is using separate transmit and receive antennas designed in such a way as to reduce coupling between them. The second is to design a negative feedback loop as part of the radar receiver where the feedback loop adaptively reduces the amount of transmitter leakage through to the receiver. This project details the realisation of these two solutions. A number of antenna designs are modelled in software and simulated to determine their characteristics of which the transmit-to-receive coupling is the key parameter. As no low coupling configuration could be found a simple configuration is chosen and practical measurements are taken. These antennas are then used in the radar system that is to be built. An FM-CW radar system is designed and simulated using software with a negative feedback loop being designed and implemented into the radar simulation. A practical radar system is then made inclusive of the feedback loop. Measurements are then taken to determine the efficacy of the feedback loop. / AFRIKAANSE OPSOMMING: ʼn Bekende probleem met FM-CW radar stelsels is die lekkasie van versender krag tot in die ontvanger wat lei tot die maak van nabye teikens en kan die stelsel se dinamiese sendbereik steng beperk. Hierdie tesis oorweeg twee oplossings tot hierdie probleem vir ʼn lae frekwensie radar wat in die VHF band werk. Die eerste metode wat na gekyk word om die koppeling te onderdruk is om die twee antennas van die radar stelsel so te ontwerp sodat die hoeveelheid koppeling tussen hulle verminder is. Die tweede is om ʼn negatiewe terugvoerlus as deel van die ontvanger te ontwerp. Hierdie terugvoerlus sal die versender lekkasie sein aanpassend in die ontvanger verminder. In hierdie projek word die realisering van bogenoemde oplossings uiteengeset. ʼn Paar verskillende antenna ontwerpe word gemodelleer in sagteware en word gesimuleer om hul karakteristieke te bepaal. Die belangrikste van hierdie faktore is die versender na ontvanger koppeling. Sienend dat geen ontwerp met ʼn lae genoeg koppeling gevind kon word nie, is ʼn eenvoudige ontwerp gekies en praktiese metings daarvan geneem. Hierdie antennas word dan gebruik in die radar stelsel wat gebou sal word. ʼn FM-CW radar stelsel word ontwerp en gesimuleer in sagteware. Die negatiewe terugvoerlus word ook ontwerp en geïmplementeer in die radar simulasie. ʼn Praktiese radar stelsel word dan gemaak insluitend die terugvoerlus. Metings word dan geneem om die effektiwiteit daarvan te bepaal.