The primary advantage of Class D amplifier is high power efficiency (typically >90%). However, there are two problems in open-loop Class D design: Total Harmonic Distortion (THD) and output dc static current (the power efficiency will be degraded). The THD is rising from non-ideal sample carrier in Pulse Width Modulation circuit, and output dc static current is due to the non-match transfer characteristic in output stage. For designer to have such problems will be a large load. To improve these two problems, we proposed a Class D power amplifier with passive feedback design. Simulation and Measurement results show that the power efficiency is higher than 90% at 250Hz ~ 4KHz. Furthermore, the THD is less than 0.24% at 4 KHz in both simulation and experimental results.
Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0822105-020221 |
Date | 22 August 2005 |
Creators | Chuang, Yao-Jen |
Contributors | Shiang-Hwua Yu, Chia-Hsiung Kao, Yao-Tsung Tsai, Jyi-Tsong Lin |
Publisher | NSYSU |
Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
Language | English |
Detected Language | English |
Type | text |
Format | application/pdf |
Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0822105-020221 |
Rights | campus_withheld, Copyright information available at source archive |
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