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The audio power amplifier is used to amplify low-power audio signals to a level that can be suitable for driving the loudspeakers. Thus the audio power amplifier becomes a kind of essential part in the electronics that could make sounds. In this thesis, a good performance audio power amplifier with tonality control is designed. It consists of three parts: pre-amplifier unit, the tonality control unit and the power amplifier unit. In the pre-amplifier unit, a TL071CP operational amplifier is applied, to amplify the low signal to be suitable for the tonality control unit. For the tonality control unit, a filter is used to achieve bass and treble control, resulting in different frequency response. In the last part, the low voltage power amplifier LM386N-1 is used. The results of simulation in Multisim show a good output waveform and different frequency response with the tonality control. Also the pure sound can be heard by ear clearly. The good simulation result offers the encouragement to build the circuit on the board and do the measurement. The measured results show a good output waveform, the output power 256mW, THD 4.7%, the maximum voltage gain 40 etc. Meanwhile, sound can be heard by ear clearly with the tonality control. Judging from the results, the audio power amplifier is designed successfully.

Power amplifiers are an indispensible part of the wireless communication systems. Conventional PAs provide peak efficiency at peak output power which is obtained at a certain fixed optimum resistance. These kind of amplifiers are normally called switched-mode power amplifiers (SMPAs) and are used for constant envelope signals. However, there is low efficiency at low output power which is the linear operation of a PA and is used for the amplification of non-constant envelope signals. For an optimum PA design, linearity and efficiency are the requirements. There are efficiency  enhancement techniques and Doherty architecture is one such approach. Classical Doherty (symmetric) approach entertains the signals that have peak to average power ratio (PAPR) of 6 dB. Applications like Long Term Evolution (LTE) having high PAPR of nearly 9 dB demand efficiency throughout the back-off range. Therefore the challenge is to design and implement an asymmetric Doherty power amplifier that ensures high efficiency in the back-off range greater than 6 dB. This work presents the design and implementation of an Asymmetric Doherty Power Amplifier (ADPA) for 12 dB back-off at 2.65 GHz in Gallium Nitride (GaN) High Electron Mobility Transistors (HEMTs) technology. The carrier and peaking amplifiers are biased in class-B and C mode of operations, respectively. A branchline coupler is used to divide the input signal equally to amplifiers input. A 10 W GaN HEMT transistor is used as an active device for both amplifiers. The design has been implemented with ideal transmission lines and then shifted to microstrip lines using 508 um substrate. The measurement results of the ADPA prototype, when drain of carrier and peaking devices are biased at 24 V and 28 V  respectively, showed an input power back of (IPBO) of 9.68 dB with almost same power added efficiency (PAE) of 44% throughout the entire back-off range. The simulations are done with Agilent ADS and Momentum is used for Electromagnetic (EM) simulation.

Two kinds of low distortion switching power amplifiers are presented in this thesis. In the first power amplifier, we use feedback and low voltage low power circuits to improve the distortion and power efficiency. In the second power amplifier, we use ring oscillator and Noise shaping to construct the circuit and filters are added in the feedback loop to reduce the quantization noise. HSPICE simulations and experimental results verify the proposed circuits. Experimental results show that the THDs of both circuits are all lower than 0.27% at 1.5V supply voltage. This result shows that the proposed power amplifiers have superior performance in THD, and these circuits are applicable to low-distortion, high-efficiency, and low-voltage applications, such as the hearing instruments.

The design of a low distortion and high efficiency self-oscillating power amplifier is presented. It is designed using TSMC 0.35µm, 2p4m CMOS technology. We use noise shaping to reduce the THD (Total Harmonic Distortion). This design can be applied to hearing aids. The supply voltage is 1.5V for hearing aids. Experimental results demonstrate that the proposed amplifier has the total harmonic distortion (THD) of 0.0751% and power efficiency around 90.1%. Measurement result reveals that this circuit can be up to 0.25% of the THD and 89.7% of the power efficiency. This result shows that the proposed power amplifier has superior performance in THD and power efficiency, and this circuit is applicable to low-distortion, high-efficiency, and low-voltage applications, such as the hearing aids.

With the growth of smart phones, the demand for more broadband, data centric technologies are being driven higher. As mobile operators worldwide plan and deploy 4th generation (4G) networks such as LTE to support the relentless growth in mobile data demand, the need for strategically positioned pico-sized cellular base stations known as ‘pico-cells’ are gaining traction. In addition to having to design a transceiver in a much compact footprint, pico-cells must still face the technical challenges presented by the new 4G systems, such as reduced power consumptions and linear amplification of the signals. The RF power amplifier (PA) that amplifies the output signals of 4G pico-cell systems face challenges to minimize size, achieve high average efficiencies and broader bandwidths while maintaining linearity and operating at higher frequencies. 4G standards as LTE use non-constant envelope modulation techniques with high peak to average ratios. Power amplifiers implemented in such applications are forced to operate at a backed off region from saturation. Therefore, in order to reduce power consumption, a design of a high efficiency PA that can maintain the efficiency for a wider range of radio frequency signals is required. The primary focus of this thesis is to enhance the efficiency of a compact RF amplifier suitable for a 4G pico-cell base station. For this aim, an integrated two way Doherty amplifier design in a compact 10mm x 11.5mm monolithic microwave integrated circuit using GaN device technology is presented. Using non-linear GaN HFETs models, the design achieves high effi-ciencies of over 50% at both back-off and peak power regions without compromising on the stringent linearity requirements of 4G LTE standards. This demonstrates a 17% increase in power added efficiency at 6 dB back off from peak power compared to conventional Class AB amplifier performance. Performance optimization techniques to select between high efficiency and high linearity operation are also presented. Overall, this thesis demonstrates the feasibility of an integrated HFET Doherty amplifier for LTE band 7 which entails the frequencies from 2.62-2.69GHz. The realization of the layout and various issues related to the PA design is discussed and attempted to be solved.

This thesis work studied the behavioral modeling, estimation of parameters, model performance and linearization of power amplifier (PA) using Digital Pre Distortion (DPD) technique. PAs are one of the fundamental block in communication systems and also one of the main sources of nonlinearities in the system, as these devices are frequently subjected to signals characterized by considerable bandwidths and non-constant envelopes due to use of modern modulation technique. Moreover, PAs have high efficiency level at its nonlinear region. So, to operate the PA at its high efficiency region, linearization operation needs to be done. This has been investigated in this thesis work with the help of behavioral modeling and DPD. An essential initial step in designing a linearizer for a PA is to model the PA nonlinearity accurately. Behavioral modeling has been used for PA model for its computational efficiency, which means by relating input and output signals without addressing to the physical analysis of the device. DPD technique has been chosen for linearizing the performance of PA based on their low requirement of resources for implementation. In this thesis, five different PA models with memory effect, based on Volterra series, are studied and compared for three different PAs selected by Ericsson. These PAs are designed for third and fourth generation telecommunication system. Two different signals with different peak to average ratios and different bandwidths have been used as input signals of PA for this study. The main result in this thesis work includes the comparison of all five forward behavioral modeling results for all three PA’s. The results also describe that; two of the given PA’s can be linearized by using the DPD technique within the 3GPP standard regulations for ACPR.

This thesis presents a transmitter with digital baseband predistorter to improve linearity of power amplifier. The architecture adopts the look-up table predistorter base on a polar scheme, and realizes the digital processor using FPGA. The predistortion for AM/AM and AM/PM nonlinear relations in a 0.5£gm GaAs pHEMT class-AB power amplifier has been performed. One-tone, two-tone and multi-tone continuous waves generated by baseband signal are used for linearity test. The results demonstrate that the digital predistortion technique can effectively improve intermodulation distortion. With this technique, the power amplifier can operate in the higher power range to achieve a similar linearity and a higher efficiency.

With the growth of smart phones, the demand for more broadband, data centric technologies are being driven higher. As mobile operators worldwide plan and deploy 4th generation (4G) networks such as LTE to support the relentless growth in mobile data demand, the need for strategically positioned pico-sized cellular base stations known as ‘pico-cells’ are gaining traction. In addition to having to design a transceiver in a much compact footprint, pico-cells must still face the technical challenges presented by the new 4G systems, such as reduced power consumptions and linear amplification of the signals. The RF power amplifier (PA) that amplifies the output signals of 4G pico-cell systems face challenges to minimize size, achieve high average efficiencies and broader bandwidths while maintaining linearity and operating at higher frequencies. 4G standards as LTE use non-constant envelope modulation techniques with high peak to average ratios. Power amplifiers implemented in such applications are forced to operate at a backed off region from saturation. Therefore, in order to reduce power consumption, a design of a high efficiency PA that can maintain the efficiency for a wider range of radio frequency signals is required. The primary focus of this thesis is to enhance the efficiency of a compact RF amplifier suitable for a 4G pico-cell base station. For this aim, an integrated two way Doherty amplifier design in a compact 10mm x 11.5mm monolithic microwave integrated circuit using GaN device technology is presented. Using non-linear GaN HFETs models, the design achieves high effi-ciencies of over 50% at both back-off and peak power regions without compromising on the stringent linearity requirements of 4G LTE standards. This demonstrates a 17% increase in power added efficiency at 6 dB back off from peak power compared to conventional Class AB amplifier performance. Performance optimization techniques to select between high efficiency and high linearity operation are also presented. Overall, this thesis demonstrates the feasibility of an integrated HFET Doherty amplifier for LTE band 7 which entails the frequencies from 2.62-2.69GHz. The realization of the layout and various issues related to the PA design is discussed and attempted to be solved.

This thesis utilizes the digital predistortion technique to improve the linearity of high power amplifiers for WiMAX basestation applications. The power amplifier with the proposed technique can achieve higher output power and efficiency than with the conventional output power backoff technique. Owing to a very high PAPR value of the OFDM modulation signals applied to WiMAX basestation, the linearity requirement for the basestation power amplifiers is very strict. This thesis adopts a look-up table predistorter based on a polar scheme and realizes the digital predistorter circuitry using FPGA. As a result, the implemented digital predistorter successfully enhances the linearity of a 15W Lateral MOSFET Class-AB power amplifier operating in 2.6 GHz WiMAX band. Under the conditions that satisfy the spectrum mask and EVM requirement, the power amplifier with the digital predistorter can operate at higher output power and conversion efficiency than without the digital predistorter.