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Binary Recurrent Unit: Using FPGA Hardware to Accelerate Inference in Long Short-Term Memory Neural Networks

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Identiferoai:union.ndltd.org:OhioLink/oai:etd.ohiolink.edu:dayton1524402925375566
Date31 May 2018
CreatorsMealey, Thomas C.
PublisherUniversity of Dayton / OhioLINK
Source SetsOhiolink ETDs
LanguageEnglish
Detected LanguageEnglish
Typetext
Sourcehttp://rave.ohiolink.edu/etdc/view?acc_num=dayton1524402925375566
Rightsunrestricted, This thesis or dissertation is protected by copyright: all rights reserved. It may not be copied or redistributed beyond the terms of applicable copyright laws.

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