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Procedural layout of a high-speed floating-point arithmetic unit

Robert Clyde Armstrong. / Originally presented as author's thesis (Electrical Engineer --Massachusetts Institute of Technology) 1985. / Bibliography: leaf 116. / Supported in part by the U.S. Air Force Office of Scientific Research contract F49620-84-C-0004

Identiferoai:union.ndltd.org:MIT/oai:dspace.mit.edu:1721.1/4235
Date January 1985
ContributorsArmstrong, Robert Clyde.
PublisherMassachusetts Institute of Technology, Research Laboratory of Electronics
Source SetsM.I.T. Theses and Dissertation
LanguageEnglish
Detected LanguageEnglish
Format116 p., 6588811 bytes, application/pdf
RelationTechnical report (Massachusetts Institute of Technology. Research Laboratory of Electronics) ; 508.

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