The first topic of this thesis is a voltage boost level clamping circuit for a flash memory which utilizes an implicit feedback loop as well as MOS transistors with different threshold voltages. The proposed design can be added to charge pumps to stabilize the output voltage. The unwanted output voltage spikes introduced by the linear pumping ratio are prevented. Not only are possible damages to memory cores avoided, the power disspation is reduced in contrast with prior regulator methods.
The second topic is a switch-current 3-bit CMOS wideband random signal generator, which utilizes a digital normalizer to flatten the distribution of the probability in the entire range of B parameter. The ¡§colored¡¨ random numbers problem in prior designs is resolved. In addition, the coefficients of the proposed design are dynamically adjustable.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0624103-110530 |
| Date | 24 June 2003 |
| Creators | Cheng, Hong-Chen |
| Contributors | Hsiao-Hwa Chen, Ju-Ya Chen, Chua-Chin Wang, Lon-Rong Hu |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | Cholon |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0624103-110530 |
| Rights | not_available, Copyright information available at source archive |
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