"Previous implementations of digital background calibration for cyclic ADCs have required linear amplifier behavior in the gain stage for accurate correction. Correction is digital decoding of ADC outputs to determine the original ADC input. Permitting nonlinearity in the gain stage of the ADC allows for less demanding amplifier design requirements, reducing power and size. However this requires a method of determining the value of this variable gain during digital correction. Look up tables (LUTs,) are an effective and efficient method of compensating for analog circuit imperfections. The LUT correction and calibration method discussed in this work has been simulated using Cadence integrated circuit simulation ADC specifications and MATLAB."
| Identifer | oai:union.ndltd.org:wpi.edu/oai:digitalcommons.wpi.edu:etd-theses-2013 |
| Date | 02 September 2009 |
| Creators | Spetla, Hattie |
| Contributors | Stephen J. Bitar, Committee Member, Donald Richard Brown III, Committee Member, John A. McNeill, Advisor |
| Publisher | Digital WPI |
| Source Sets | Worcester Polytechnic Institute |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | Masters Theses (All Theses, All Years) |
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