In this thesis, low-power charge-pump (CP) based switched-capacitor (SC) circuits are proposed. The approach is validated in SC integrators and gain stages, and is shown to achieve power savings compared to conventional SC circuits. For the same thermal noise and settling performance, a CP based integrator with N sampling capacitors ideally consumes N^2 times lower OTA power compared to a conventional integrator. Practical effects such as the OTA
partial slew-rate limitation and the CP parasitics reduce the power savings. In the case of a SC gain stage, reduction in power savings also occurs due to the load capacitance from the next stage. A prototype delta-sigma modulator employing a CP integrator at the front-end is
fabricated. Experimental results demonstrate that the CP based ADC achieves the same performance as a conventional ADC while consuming three times lower OTA power in the front-end integrator. The CP ADC achieves 87.8 dB SNDR 89.2 dB SNR and 90 dB DR over a 10 kHz bandwidth while consuming 148 uW from a 1.2 V power supply. The conventional ADC
has similar performance but dissipates 241 uW. The CP ADC figure-of-merit (FOM) is 0.369
pJ/conv-step, which is almost 40% lower than that of the conventional ADC.
| Identifer | oai:union.ndltd.org:TORONTO/oai:tspace.library.utoronto.ca:1807/35917 |
| Date | 09 August 2013 |
| Creators | Nilchi, Alireza |
| Contributors | Johns, David A. |
| Source Sets | University of Toronto |
| Language | en_ca |
| Detected Language | English |
| Type | Thesis |
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