Advancements in the sophistication and complexity of modern electronic systems are creating a need for highly integrated systems with ever higher operational frequencies. The economical demands of these systems dictate that they be implemented using low cost fabrication technologies, such as digital CMOS. One of the major challenges facing circuit designers is the difficulty in implementing high frequency RF analog circuits on these types of technologies. Analog circuits which make use of parasitic-laden components such as inductors are especially difficult to realize.
The purpose of this thesis is to investigate the design and application of an optimization tool based on simulated annealing to this type of problem. The goal is to have the optimizer incorporate these unavoidable component parasitics into a design, and thus eliminate any undesirable performance degradation.
The optimization technique will be applied to the design of a CMOS RF distributed amplifier. This type of amplifier has a flat gain characteristic over an exceptionally wide bandwidth, and it is heavily reliant on inductive structures. Historically, an amplifier of this type has never been implemented on a standard CMOS process, without the use of bondwire inductances or special processing techniques. However, it will be shown in this thesis that, with the aid of the optimization technique, a distributed amplifier
design can be successfully realized on a standard CMOS process. / Graduation date: 1999
| Identifer | oai:union.ndltd.org:ORGSU/oai:ir.library.oregonstate.edu:1957/33554 |
| Date | 13 November 1998 |
| Creators | Ballweber, Brian M. |
| Contributors | Allstot, David J. |
| Source Sets | Oregon State University |
| Language | en_US |
| Detected Language | English |
| Type | Thesis/Dissertation |
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