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1	Design and computer aided optimization of a fully integrated CMOS RF distributed amplifier Ballweber, Brian M. 13 November 1998 (has links) Advancements in the sophistication and complexity of modern electronic systems are creating a need for highly integrated systems with ever higher operational frequencies. The economical demands of these systems dictate that they be implemented using low cost fabrication technologies, such as digital CMOS. One of the major challenges facing circuit designers is the difficulty in implementing high frequency RF analog circuits on these types of technologies. Analog circuits which make use of parasitic-laden components such as inductors are especially difficult to realize. The purpose of this thesis is to investigate the design and application of an optimization tool based on simulated annealing to this type of problem. The goal is to have the optimizer incorporate these unavoidable component parasitics into a design, and thus eliminate any undesirable performance degradation. The optimization technique will be applied to the design of a CMOS RF distributed amplifier. This type of amplifier has a flat gain characteristic over an exceptionally wide bandwidth, and it is heavily reliant on inductive structures. Historically, an amplifier of this type has never been implemented on a standard CMOS process, without the use of bondwire inductances or special processing techniques. However, it will be shown in this thesis that, with the aid of the optimization technique, a distributed amplifier design can be successfully realized on a standard CMOS process. / Graduation date: 1999 Amplifiers (Electronics) -- Design
2	Analysis and design of CMOS RF LNAs with ESD protection Chandrasekhar, Vinay 01 April 2002 (has links) An analysis that accounts for the effect of standard electrostatic discharge (ESD) structures on critical LNA specifications of noise figure, input matching and gain is presented. It is shown that the ESD structures degrade LNA performance particularly for higher frequency applications. Two LNAs, one with ESD protection and one without, which operate at 2.4 GHz have been fabricated in a 0.l5��m CMOS process. The LNAs feature one of the best reported performances for CMOS LNAs to date. The LNA with ESD protection achieves a gain of 12dB, a NF of 2.77dB and an IIP3 of 2.4dBm with a power consumption of 4.65mW. The LNA without ESD protection achieves a gain of 14dB, a NF of 2.36dB and an 11P3 of -2.2dBm with a power consumption of 4.65mW. / Graduation date: 2002 Amplifiers (Electronics) -- Design
3	A wideband CMOS low-noise amplifier for UHF applications Lo, Ivy Iun January 2005 (has links) Thesis (M.S.)--University of Hawaii at Manoa, 2005. / Includes bibliographical references (leaves 95-98). / xii, 98 leaves, bound ill. 29 cm
4	A high performance current mode amplifier with boosted saturation voltage. January 2009 (has links) Tsang, Ka Hung. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2009. / Includes bibliographical references. / Abstract also in Chinese. / Abstract / Acknowledgement / Content / Chapter 1. --- Introduction / Chapter 1.1 --- Motivation for Current-Mode Circuit --- p.1-1 / Chapter 1.2 --- Basic Current-Mode Building Block --- p.1-3 / Chapter 1.3 --- Adjoint Principle --- p.1-5 / Chapter 1.4 --- Characteristics of Current Amplifier --- p.1-8 / Chapter 1.5 --- Application of Current-Mode Circuit --- p.1-10 / Chapter 2. --- Conventional Design / Chapter 2.1 --- System Overview --- p.2-1 / Chapter 2.2 --- First Architecture and Circuit (Fully Current Mode) --- p.2-6 / Chapter 2.3 --- Second Architecture and Circuit (Voltage Mode) --- p.2-10 / Chapter 2.4 --- Performance Indicator --- p.2-15 / Chapter 3. --- Proposed Design / Chapter 3.1 --- Design Motivation --- p.3-1 / Chapter 3.2 --- Saturation Voltage Gain Stage (SVGS) --- p.3-7 / Chapter 3.3 --- Design 1: Current Amplifier with Boosted Saturation Voltage (Fully Current Mode) --- p.3-13 / Chapter 3.4 --- Design 2: Current Amplifier with Boosted Saturation Voltage (Voltage Mode) --- p.3-22 / Chapter 4. --- IC Measurement / Chapter 5. --- Conclusion / Chapter 5.1 --- Design 1: Current Amplifier with Boosted Saturation Voltage (Fully Current Mode) over Conventional Design --- p.5-1 / Chapter 5.2 --- Design 2: Current Amplifier with Boosted Saturation Voltage (Voltage Mode) over Conventional Design --- p.5-2 / Chapter 6. --- Future Idea / Chapter 7. --- Reference / Chapter 8. --- Appendix Electronic circuit design
5	Multi-Gbit/s CMOS Transimpedance Amplifier with Integrated Photodetector for Optical Interconnects Song, Indal 24 November 2004 (has links) Trends toward increased integration and miniaturization of optical system components have created pressure to consolidate widely disparate analog and digital functions onto fewer and fewer chips with a goal of eventually built into a single mixed-signal chip. Yet, because of those performance requirements, the frontend circuit has traditionally used III-V compound semiconductor technologies, but the low-level of integration with other digital ICs limits the sustainability of such end products for short-distance applications. On the other hand, their CMOS counter parts, despite having such advantages as low power consumption, high yield that lowers the cost of fabrication, and a higher degree of integration, have not performed well enough to survive in such a noisy environment without sacrificing other important attributes. In this research, a high-speed CMOS preamplifier was designed and fabricated through TSMC 0.18/spl mu/m mixed-signal non-epi CMOS technology, and a 20/spl mu/m diameter InGaAs thin-film Inverted-MSM photodetector with a responsivity of 0.15A/W at a wavelength of 1550/spl mu/m was post-integrated onto the circuit. The circuit has a overall transimpedance gain of 60dB/spl Omega/, and bit-error-rate data and eye-diagram measurement results taken as high as 10Gbit/s are reported in this dissertation. MSM Receiver Fiber optics Noise Feedback
6	Ring amplification for switched capacitor circuits Hershberg, Benjamin Poris 19 July 2013 (has links) A comprehensive and scalable solution for high-performance switched capacitor amplification is presented. Central to this discussion is the concept of ring amplification. A ring amplifier is a small modular amplifier derived from a ring oscillator that naturally embodies all the essential elements of scalability. It can amplify with accurate rail-to-rail output swing, drive large capacitive loads with extreme efficiency using slew-based charging, naturally scale in performance according to process trends, and is simple enough to be quickly constructed from only a handful of inverters, capacitors, and switches. In addition, the gain-enhancement technique of Split-CLS is introduced, and used to extend the efficacy of ring amplifiers in specific and other amplifiers in general. Four different pipelined ADC designs are presented which explore the practical implementation options and design considerations relevant to ring amplification and Split-CLS, and are used to establish ring amplification as a new paradigm for scalable amplification. / Graduation date: 2012 / Access restricted to the OSU Community, at author's request, from July 19, 2012 - July 19, 2013 ring amplification ring amplifier ring amp ringamp RAMP Split-CLS CLS correlated level shifting switched-capacitor scaled CMOS scaling scalability analog to digital conversion A/D analog to digital converter ADC low power rail-to-rail slew-based stabilized ring oscillator high resolution Switched capacitor circuits

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