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Design and analysis of a memory hierarchy for a very high performance multiprocessor configuration

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1982. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Vita. / Bibliography: p. 204-221. / by Evan Michael Tick. / M.S.

Identiferoai:union.ndltd.org:MIT/oai:dspace.mit.edu:1721.1/15753
Date January 1982
CreatorsTick, Evan Michael
ContributorsArvind., Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science., Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
PublisherMassachusetts Institute of Technology
Source SetsM.I.T. Theses and Dissertation
LanguageEnglish
Detected LanguageEnglish
TypeThesis
Format212 p., 11927075 bytes, 11926835 bytes, application/pdf, application/pdf, application/pdf
RightsM.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission., http://dspace.mit.edu/handle/1721.1/7582

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