M.Ing. / The drive for smaller and higher density power supplies have been realised by advances in switching technologies, higher frequencies and smaller components. Along with the advances of higher switching frequencies, came a number of restrictive parasitic effects that were insignificant at lower frequencies (in use a few years ago). A problem that is becoming of increasing concern, as the frequencies increase, rise times decrease and current levels increase, is the reactance of the parasitic inductance in voltage fed converter. This inductance is responsible for a multitude of limitations and problems in high frequency converters, with the most important being unstable voltage supplies, large voltage spikes during switching (which leads to electromagnetic interference), and power transfer limitations. The main contributors of this parasitic inductance was found to be the inherent inductance of the conductors of the DC bus, the internal inductance of the capacitor elements used in the DC bus and the paralleling of these capacitor elements (capacitor bank). It was decided to investigate the cause of these identified inductances in an attempt at finding a means to reduce them, thereby improving the performance of the converter. This was accompanied by a search into prediction methods for the inductance and capacitance of the DC bus conductors. The ability to predict the inductance and capacitance inherent to the DC bus conductors, will allow for a large decrease in prototyping, and should give insight into the causes of these elements and how to manipulate them. This was done for the DC bus conductors, and led to insight into their inductance and capacitance origins. Means to reduce this inductance was found, along with the ability to predict the inductance and capacitance of a number of DC bus conductors. The last two identified parasitic inductance sources, the internal inductance of the capacitors and inductance of the capacitor bank, were then investigated. The cause of the inductance in the capacitor elements was discovered, along with the factors on which the capacitor elements are dependent. A great deal of the inductance, and its associated effects, can be avoided through proper capacitor selection and correct capacitor bank design. In order to bring this study in context with a practical scenario, the information previously obtained was incorporated in a full bridge voltage fed converter. The previous findings on inductance and capacitance held equally well when applied to a practical scenario. Additional means to reduce the effects of the parasitic inductances were discovered, and the inductance and capacitance prediction methods proved to be relatively accurate when applied to the DC bus conductors of a physical converter.
| Identifer | oai:union.ndltd.org:netd.ac.za/oai:union.ndltd.org:uj/uj:9202 |
| Date | 14 August 2012 |
| Source Sets | South African National ETD Portal |
| Detected Language | English |
| Type | Thesis |
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