The thesis proposes a third order continuous-time sigma delta modulator used in GSM. We used a special 1.5bit quantizer, and to use its three different states to reach a differential feedback path. That can improve the resolution of our circuit.
Oversampling and noise shaping are two keys of sigma delta modulator. In structure, the continuous-time features can reduce power consumption.
The proposed sigma delta modulator uses TSMC 0.35 m CMOS process and its sampling frequency is 10.8MHz, bandwidth is200KHz and oversampling ratio is 32.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0830111-145845 |
| Date | 30 August 2011 |
| Creators | Kang, Ruei-Gen |
| Contributors | Jyi-Tsong Lin, Chia-Hsiung Kao, Tzyy-Sheng Horng, Ko-Chi Kuo |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | English |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830111-145845 |
| Rights | user_define, Copyright information available at source archive |
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