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Study and Implementation of DVB-H Receiver RF Module Using Dual-Conversion Architecture with Zero Second IF

This thesis consisted of three parts. The first part discussed the RF architecture for the digital video broadcasting-handheld (DVB-H) system. The system planning and link budget of the RF receiver are included in this part. The effects of phase noise from local oscillator on the OFDM system are also considered here. The second part introduced the implementation of each stage for the designed receiver link. The measurement results for the entire RF receiver module are discussed in the third part, at which the link budget results are also presented for comparison. The sensitivity of the designed RF receiver module is -83 dBm, the dynamic range is more than 73 dB, and the power consumption is 345 mW. The designed RF receiver adopts the dual conversion with zero second IF architecture reduces the number of ICs, passive components, and the power consumption. In addition, the SAW filter is no longer required in the receiver link, and it is more suitable for the system-on-chip application.

Identiferoai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0726105-181116
Date26 July 2005
CreatorsCheng, Kai-Jen
ContributorsHuey-Ru Chuang, Sheng-Fuh Chang, Chin-Chun Meng, Tzon-lin Wu, Tzyy-Sheng Horng
PublisherNSYSU
Source SetsNSYSU Electronic Thesis and Dissertation Archive
LanguageCholon
Detected LanguageEnglish
Typetext
Formatapplication/pdf
Sourcehttp://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726105-181116
Rightsunrestricted, Copyright information available at source archive

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