The design of a high speed circuit accepting a bipolar analog signal with a 3 db bandwidth of 20 MHZ and an eight bit unipolar gain control signal is presented in this thesis. The system produces the product of these two signals at a rate of one digital byte every 25 nsec. At the heart of the system are two multiplying digital to analog converters (DACs) operating in parallel. The circuit design was based on a statistically validated model for a multiplying DAC. This circuit could be used for controlling the intensity of each picture element (i.e. pixel) for many existing video display systems.
| Identifer | oai:union.ndltd.org:ucf.edu/oai:stars.library.ucf.edu:rtd-5700 |
| Date | 01 January 1984 |
| Creators | Movassaghi, Yassin |
| Publisher | University of Central Florida |
| Source Sets | University of Central Florida |
| Language | English |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | Retrospective Theses and Dissertations |
| Rights | Public Domain |
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