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Area efficient D/A converters for accurate DC operationGreenley, Brandon Royce 31 May 2001 (has links)
The design of mixed-signal integrated circuits has evolved from simple analog and
digital circuits operating on the same silicon substrate to the point that now we
have complete system on a chip solutions for communication systems. The levels of
integration needed to remain cost effective in today's integrated circuit (IC) market
require careful use of all the available die space. The current trend of digital to
analog converter (DAC) design has focused on maximizing speed and linearity for
high performance telecommunications systems. The circuit design methods used to
achieve very high sample rates require the use of large amounts of die space.
This thesis presents a 10-bit DAC that has been optimized for area, while still
maintaining accurate operation at low frequencies. To achieve 10-bit performance,
an ultra high gain op-amp is introduced for various servoing applications in the
DAC. The architecture chosen for the DAC will show an optimization of required
die size and performance when compared to other architectures. The DAC was
fabricated in a standard digital 0.18 μm CMOS process. The DAC occupies 0.0104
mm² (110 μm x 94 μm), and only consumes 2.8 mW of power. In addition to the
10-bit DAC, a design is presented for a 13-bit DAC which occupies 0.020 mm², and
requires only the addition of a minimum number of devices to the 10-bit DAC. / Graduation date: 2002
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Oversampling digital-to-analog convertersShu, Shaofeng 07 June 1995 (has links)
Oversampling and noise-shaping methods for digital-to-analog (D/A) conversion have
been widely accepted as methods of choice in high performance data conversion
applications. In this thesis, the fundamentals of D/A conversion and oversampling D/A
conversion were discussed, along with the detailed analysis and comparison of the reported
state-of-the-art oversampling D/A converters.
Conventional oversampling D/A converters use 1-bit internal D/A conversion. Complex
analog filters and/or large oversampling ratios are usually needed in these 1-bit
oversampling D/A converters. Using multi-bit internal D/A conversion, the analog filter
can be much simpler and the oversampling ratio can be greatly reduced. However, the
linearity of the multi-bit D/A converter has to be at least the same as that required by the
overall system.
The dual-quantization technique developed in the course of this research provides a good
alternative for implementing multi-bit oversampling D/A converters. The system uses two
internal D/A converters; one is single-bit and the other is multi-bit. The single-bit D/A
converter is used in a path called the signal path while the multi-bit D/A converter is used
in a path called the correction path. Since the multi-bit D/A converter is not directly placed
in the signal path, its nonlinearity error can be noise shaped by an analog differentiator so
that the in-band noise contribution from the nonlinearity error is very small at the system
output, greatly reducing the linearity requirement on the multi-bit internal D/A converter.
An experimental implementation of an oversampling D/A converter using the
dual-quantization technique was carried out to verify the concept. Despite about 10 dB
higher noise than expected and the high second-order harmonic distortion due to practical
problems in the implementation, the implemented system showed that the corrected output
had more than 20 dB improvement over the uncorrected output in both signal-to-noise ratio
and dynamic range, demonstrating the validity of the concept. / Graduation date: 1996
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Analysis and design of oversampled digital-to-analog convertersXu, Xiaofeng 12 March 1992 (has links)
Oversampled data converters are becoming increasingly popular
for high-precision data conversion. There have been many
publications on oversampled analog-to-digital (A/D) converters but
relatively few on oversampled digital-to-analog (D/A) converters.
In this thesis, issues concerning the analysis and design of the
oversampled D/A converters are addressed. Simulation tools and
analytical methods are discussed. A novel dual-quantization
technique for achieving high-precision D/A conversion is
proposed. A design example is presented to demonstrate that in
many aspects the proposed technique is superior to existing
techniques.
The thesis is divided into four chapters. Chapter 1 is an
introduction to the general concepts of Nyquist-rate and
oversampled data converters. Chapter 2 describes some building
blocks to be used in oversampled D/A converters and gives both
theoretical and simulation methods for analzying them. Chapter 3
describes the proposed dual-quantization D/A converters,
including the structure, the associated design issues and an
example to verify the validity of this technique. Finally, Chapter 4
summarizes the properties of the simulated system and proposes
some future research work. / Graduation date: 1992
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The design of a calibration-free multiplying digital-to-analog converterGuenther, Edgar Theodore, 1941- January 1972 (has links)
No description available.
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Enhanced-accuracy oversampled data converters /Ceballos, Jose Luis. January 1900 (has links)
Thesis (Ph. D.)--Oregon State University, 2006. / Printout. Includes bibliographical references (leaves 86-88). Also available on the World Wide Web.
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A multi-bit delta sigma audio digital-to-analog converter /Wang, Ruopeng. January 1900 (has links)
Thesis (Ph. D.)--Oregon State University, 2007. / Printout. Includes bibliographical references (leaves 89-91). Also available on the World Wide Web.
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A study of non-uniform quantization methods for memoryless sources /Joo, Eon Kyeong January 1987 (has links)
No description available.
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Gain Control of a Time-Varying Signal Using a Multiplaying DACMovassaghi, Yassin 01 January 1984 (has links) (PDF)
The design of a high speed circuit accepting a bipolar analog signal with a 3 db bandwidth of 20 MHZ and an eight bit unipolar gain control signal is presented in this thesis. The system produces the product of these two signals at a rate of one digital byte every 25 nsec. At the heart of the system are two multiplying digital to analog converters (DACs) operating in parallel. The circuit design was based on a statistically validated model for a multiplying DAC. This circuit could be used for controlling the intensity of each picture element (i.e. pixel) for many existing video display systems.
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Lowpass and bandpass current-mode delta-sigma DACs employing mismatch-shapingShui, Tao, 1969- 08 May 1998 (has links)
Delta-sigma modulators are currently a very popular technique for making high-resolution
analog-to-digital converters (ADCs) and digital-to-analog converters (DACs).
These oversampled data converters have several advantages over conventional Nyquist-rate
converters, including an insensitivity to many analog component imperfections, a
simpler antialiasing filter and reduced accuracy requirements in the sample and hold. A
recent development in the realm of delta-sigma-based ADC and DAC systems is the use of
multilevel (as opposed to binary) quantization. This development owes its existence to the
discovery of a variety of techniques which cause linearity errors of the embedded
multilevel DAC to be attenuated in the frequency band of interest.
This thesis presents several methods for shaping the DAC element mismatch error
and reducing the dynamic error in the band of interest. To demonstrate the effectiveness of
the proposed algorithms, a current-mode unit element DAC is designed and used as a test
bed. Both theoretical analysis and experimental results show that these methods can
greatly attenuate the noise in the band of interest. The methods presented in this thesis will
allow high performance, high-frequency wideband delta-sigma modulators to be constructed. / Graduation date: 1998
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Experimental verification of a mismatch-shaping DACHudson, William Forrest, 1971- 09 May 1997 (has links)
Delta-sigma data converters have gained popularity in both analog-to-digital and digital-to-analog converters (ADCs and DACs) due to their simplicity, high linearity and immunity to many analog circuit imperfections. These data converters include features such as oversampling, noise-shaping, and (historically) single-bit quantization. Single-bit converters are preferred for their inherent linearity. This is a feature which multibit converters cannot realize due to the unavoidable phenomenon of element mismatch. Because of this problem, multibit converters have been largely unexplored, and the market has seen few multibit commercial products.
Earlier work has shown that multibit DACs constructed with unit elements can be applied in an architecture which shapes the spectrum of the noise caused by element mismatch. The basis of this thesis is the experimental verification of such a DAC. A Xilinx 4005 FPGA is utilized to implement a 3rd-order 4-bit delta-sigma modulator and the mismatch-shaping logic, while a custom IC consisting of 16 individually-controlled differential current sources implements the unit-element DAC. The final DAC achives a Spurious Free Dynamic Range (SFDR) of 96 dB at a sampling rate of 62.5 kHz. / Graduation date: 1997
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