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Design techniques for power-efficient data converters in deep sub-micron CMOS technologies. / CUHK electronic theses & dissertations collectionJanuary 2013 (has links)
Tang, Xian. / Thesis (Ph.D.)--Chinese University of Hong Kong, 2013. / Includes bibliographical references. / Electronic reproduction. Hong Kong : Chinese University of Hong Kong, [2012] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Abstract also in Chinese.
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A fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCsWang, Xuesheng 01 December 2003 (has links)
This thesis proposes a novel fully digital technique for the estimation and
correction of the DAC error in multi-bit delta sigma ADCs. The structure of the
DAC error is indicated through a simple model for unit-element based DACs. The
impact of the DAC error on the performance of ADC is then analyzed. Various
techniques dealing with the DAC error are described and their drawbacks are
pointed out. Based on the nature of the DAC error and the surrounding signals, a
fully digital method to estimate the error from the ADC output and remove it is
proposed. Simulation results are shown to support the effectiveness of the method.
Simulations also show that the proposed technique can work together with the
technique of adaptive compensation for quantization noise leakage in cascaded
delta sigma (MASH) ADC cases. These two techniques are the foundation for the
design of high speed, high resolution delta sigma ADCs with relaxed requirements
on the analog circuits.
To verify the proposed technique, an experimental MASH ADC was built,
including the design and fabrication of a chip of a second-order multi-bit delta
sigma ADC in a 1.6��m CMOS technology. The measured results show that the
proposed DAC correction technique is highly effective. / Graduation date: 2004
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Multi-bit delta-sigma switched-capacitor DACs employing element-mismatch-shapingLin, Haiqing 08 May 1998 (has links)
Delta-sigma modulators are currently a very popular technique for making high-resolution
analog-to-digital and digital-to-analog converters (ADCs and DACs). Most
delta-sigma modulators in production today employ single-bit quantization because a 1-bit DAC is inherently linear, whereas a multi-bit DAC is not. Were it not for this drawback,
the use of multi-bit quantization would improve a delta-sigma modulator's performance
by increasing the modulator's resolution or increasing the modulators's bandwidth, while
at the same time whitening the quantization noise and improving modulator stability. This
thesis explores the element-mismatch-shaping technique, which attenuates the noise
caused by static element mismatch in a multi-level DAC by a method similar to delta-sigma
modulation.
Existing element-matching techniques are reviewed and some analytical and
architectural work related to the realization of mismatch-shaping logic is presented. A
custom switched-capacitor (SC) DAC is used to verify various element mismatch-shaping
algorithms. Experiments show that mismatch-shaping can reduce harmonic distortion
by up to 30 dB. / Graduation date: 1998
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Delta-sigma modulators employing continuous-time circuits and mismatch-shaped DACsZhang, Bo 03 April 1996 (has links)
Delta-sigma modulators are currently a very popular technique for making high-resolution
analog-to-digital and digital-to-analog converters. These oversampled data
converters have several advantages over conventional Nyquist-rate converters, including
an insensitivity to many analog component imperfections, a simpler antialiasing filter and
reduced accuracy requirements in the sample and hold. Though the initial uses of delta-sigma
modulators were in the audio field, the development of bandpass modulators opened
up the application range to radar systems, digital communication systems and instruments
which convert IF, or even RF, analog signals directly to digital form.
This thesis presents a method used to analyze and synthesize continuous-time
delta-sigma modulators for given specifications. A fourth-order prototype continuous-time
bandpass delta-sigma modulator employing g[subscript m]-LC resonator structure is demonstrated on
a PCB board and measurement results corroborate the theory. To allow the construction of
very high performance delta-sigma modulators, this thesis presents an architecture for a
multibit DAC constructed from unit elements which shapes element mismatches. Theoretical
analysis and simulation shows that this architecture greatly increases the noise attenuation
in the band-of-interest and facilitates the use of multibit quantization in delta-sigma
modulators. The methods presented in this thesis will allow high-frequency wideband
bandpass delta-sigma modulators to be constructed. / Graduation date: 1996
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Design techniques for low power ADCs /Yu, Wenhuan. January 1900 (has links)
Thesis (Ph. D.)--Oregon State University, 2010. / Printout. Includes bibliographical references (leaves 74-75). Also available on the World Wide Web.
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Efficient structures for oversampling A/D conversionDocef, Alen 12 1900 (has links)
No description available.
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A synthesis program for CMOS successive approximation A/D and D/A convertersBarton, Patrick Randal 05 1900 (has links)
No description available.
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High efficiency delta-sigma modulation data converters /Lee, Kyehyung. January 1900 (has links)
Thesis (Ph. D.)--Oregon State University, 2008. / Printout. Includes bibliographical references. Also available on the World Wide Web.
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A multibit reference feedback sigma-delta modulator for radio receivers /Kuang, Wensheng V. January 1900 (has links)
Thesis (Ph.D.) - Carleton University, 2007. / Includes bibliographical references (p. 111-116). Also available in electronic format on the Internet.
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Theory, practice, and fundamental performance limits of high-speed data conversion using continuous-time delta-sigma modulators.Cherry, James A., January 1900 (has links)
Thesis (Ph. D.)--Carleton University, 1999. / Also available in electronic format on the Internet.
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