University of Macau / Faculty of Science and Technology. / Department of Electrical and Computer Engineering

This thesis presents a continuous time bandpass delta sigma modulator with frequency translation inside the delta sigma loop. The input IF signal is down converted to baseband after amplification by a low Q, wideband bandpass resonator. The down converted IF signal is digitized by a continuous time, second order lowpass delta sigma modulator. The output of the lowpass delta sigma modulator is upconverted and fedback in to the low Q wideband bandpass resonator. Unlike the conventional delta sigma modulators, sinusoidal pulses are used for feedback. The system level design of the frequency translating delta sigma modulator is discussed. A prototype frequency translating delta sigma modulator to digitize IF signals at 100 MHz was designed in CMOS 0.35 μm process. Transistor level simulation shows that 80 dB SNR is achievable at a power dissipation of 100 mW. The frequency translating delta sigma modulator is less sensitive to time delay jitter in the DAC feedback pulse. If we use edge triggered sinusoid pulses for feedback, the DAC jitter performance of frequency translating delta sigma modulator will be better than that of conventional bandpass delta sigma modulator. / Graduation date: 2003

Graduation date: 1995

Thesis (Ph. D.)--School of Electrical and Computer Engineering, Georgia Institute of Technology, 2004. Directed by David V. Anderson. / Includes bibliographical references (leaves 58-60).

Thesis (M.S.)--Brigham Young University. Dept. of Electrical and Computer Engineering, 2003. / Includes bibliographical references (p. 89-91).

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Thesis (Ph. D.)--University of Texas at Austin, 2004. / Supervisor: Ray T. Chen. Vita. Includes bibliographical references.

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Typescript (photocopy). / Digitized by Kansas Correctional Industries