The design and implementation of Switched-Current (SI) ladder filters is
described. SI filters require only a standard digital CMOS process and the power
supply voltage requirement is low. SI circuits also can be potentially operated at
higher frequencies than Switched-Capacitor (SC) filters due to the low-impedance
wideband nodes of the current mirrors. A simple method has been developed to
design SI ladder and biquadratic fllters with maximum dynamic range that leverages
the well-established design methodologies of SC filters. A standard digital 2-micron
n-well CMOS process has been used to implement two high-order ladder filters and
two biquadratic filters. Simulations accurately predict the measured results of the
first integrated SI filters. The area and power dissipation are comparable to the
switched-capacitor technique.
Analysis of the factors that effect dynamic range in SI filters is presented.
The factors that contribute to harmonic distortion in the current-mode circuits are
characterized and the relationships to maximum signal size are established. Using
measurements of the input-referred noise from SI filters, the dynamic range is
obtained. / Graduation date: 1991
| Identifer | oai:union.ndltd.org:ORGSU/oai:ir.library.oregonstate.edu:1957/37183 |
| Date | 14 June 1990 |
| Creators | Fiez, Theresa S. |
| Contributors | Allstot, David J. |
| Source Sets | Oregon State University |
| Language | en_US |
| Detected Language | English |
| Type | Thesis/Dissertation |
Page generated in 0.0021 seconds