The growing interest in programmable analog circuits has led to the development of Field Programmable Analog Arrays (FPAAs). An FPAA consists of: 1) a programmable cell that can be reconfigured to perform several analog functions. 2) an architecture that interconnects a number of copies of the programmable cell. In this thesis, the full monolithic circuit implementation of the analog part of the programmable cell is presented. Chapter I gives an introduction to the idea of FPAA and introduces the FPAA architecture and the cell block diagram. Chapter II deals with the design and verification of a differential current-mode four-quadrant multiplier. The weighting-summing circuit with the normalizing stage is discussed in Chapter III. Chapter IV presents the design of a current-mode low-voltage programmable integratorgain circuit. Programmability was achieved by changing the bias current in the designed circuits; no analog switches were used in the signal path. This shows no effect on the performance of the circuits. The presented programming method, however, relies on the availability of a programmable current source with a storage capability. The design of this current source is discussed in chapter V. Conclusions are summarized in Chapter VI. The presented designs throughout the whole thesis were supported by detailed analytical derivations with the necessary SPICE simulations to verify the performance.
| Identifer | oai:union.ndltd.org:pdx.edu/oai:pdxscholar.library.pdx.edu:open_access_etds-6175 |
| Date | 10 May 1996 |
| Creators | Shana'a, Osama K. |
| Publisher | PDXScholar |
| Source Sets | Portland State University |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | Dissertations and Theses |
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