The advanced signal processing systems of today require extreme data throughput and low power consumption.The only way to accomplish this is to use parallel processor architecture with efficient algorithms.The aim of this thesis was to evaluate the use of parallel processor architecture in Radar signal processingapplications where the processor has to compute complex calculations. This has been done by implementingdemanding algorithms on Ambric Am2000 family Massively Parallel Processor Array (MPPA). The Ambricplatform evaluated in terms of Latency, Cycle Count per output sample and Efficiency of the developmenttools.The two algorithms chosen for implementation are Fast Fourier Transform (FFT) and Finite Impulse Response(FIR) algorithms. We have implemented parameterized versions of FFT and FIR. The FFT algorithmimplemented for N-point input for the range of 8 point to 32 point for complex input variables. It works for anygiven number of inputs within the range for given parameter values and mapped on Ambric processor withfixed point radix - 2. Another one is FIR algorithm for the range of 12 Taps to 64 Taps for complex inputvariables. The Implementation of algorithms shows that high level of parallelism can be achieved in MassivelyParallel Processing Arrays (MPPA) especially on complex algorithms like FFT and FIR.
Identifer | oai:union.ndltd.org:UPSALLA1/oai:DiVA.org:hh-6148 |
Date | January 2010 |
Creators | Pyaram, Yadagiri, Rahman, Md Mashiur |
Publisher | Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE), Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE) |
Source Sets | DiVA Archive at Upsalla University |
Language | English |
Detected Language | English |
Type | Student thesis, info:eu-repo/semantics/bachelorThesis, text |
Format | application/pdf |
Rights | info:eu-repo/semantics/openAccess |
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