As CMOS processes size continues to shrink, a number of factors limit the ability of analog circuit performance to scale with the process. These issues include smaller transistor intrinsic gains and lower supply voltages. However, scaling continues to increase the speed and decrease the power of digital circuits. In this thesis, an active time-based integrator is proposed to replace amplifiers. The integrator, implemented using highly digital ring oscillators, seeks to take advantage of benefits offered by technology scaling while negating the issues of low gain and low supply voltages. The proposed integrator topology is used in a 20MHz 4th order continuous-time analog filter. Designed in a 90nm CMOS process, the time-based continuous-time filter achieves superior noise and linearity performance compared to state-of-the-art conventional active RC filters in simulations. / Graduation date: 2012 / Access restricted to the OSU Community at author's request from June 17, 2011 - June 17, 2012
| Identifer | oai:union.ndltd.org:ORGSU/oai:ir.library.oregonstate.edu:1957/21810 |
| Date | 17 June 2011 |
| Creators | Drost, Brian George |
| Contributors | Hanumolu, Pavan Kumar |
| Source Sets | Oregon State University |
| Language | en_US |
| Detected Language | English |
| Type | Thesis/Dissertation |
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