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Simulation of quantization noise effects on the performance of a wireless preamble detector and demonstration of a functional FPGA prototype

This thesis describes the implementation of the physical layer for an experimental low-power wireless communication device. The system utilizes differential coherent correlation and threshold-based detection to produce a robust random-access packet-based communications protocol. Prior to implementing the system in hardware, the detection algorithm was rigorously simulated with a software model in C. The simulations revealed the tradeoffs between the packet miss performance and different system parameters such as input bit precision and threshold value. Having determined a suitable configuration, the detection algorithm was implemented on an FPGA platform. The focus of the FPGA design was on throughput and resource utilization. The final system utilizes approximately 6% of the slices available on a Xilinx Virtex II XC2V8000 FPGA and has a throughput of about 5 MChips/Second.

Identiferoai:union.ndltd.org:LACETR/oai:collectionscanada.gc.ca:AEU.10048/717
Date11 1900
CreatorsSon, Eric Tien Tze
ContributorsGaudet, Vincent (Electrical and Computer Engineering), Schlegel, Christian (Computing Science ), Cockburn, Bruce (Electrical and Computer Engineering)
Source SetsLibrary and Archives Canada ETDs Repository / Centre d'archives des thèses électroniques de Bibliothèque et Archives Canada
Languageen_US
Detected LanguageEnglish
TypeThesis
Format1728226 bytes, application/pdf

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