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VLSI architecture and design for the Fermat Number Transform implementation

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Identiferoai:union.ndltd.org:bl.uk/oai:ethos.bl.uk:379767
Date January 1987
CreatorsPajayakrit, A.
PublisherUniversity of Newcastle Upon Tyne
Source SetsEthos UK
Detected LanguageEnglish
TypeElectronic Thesis or Dissertation

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