Operation of SiGe BiCMOS Technology Under Extreme Environments
Tianbing Chen
96 pages
Directed by Dr. John D. Cressler
"Extreme environment electronics" represents an important niche market and spans the operation of electronic components in surroundings lying outside the domain of conventional commercial, or even military specifications. Such extreme environments would include, for instance, operation to very low temperatures (e.g., to 77 K or even 4.2 K), operation to very high temperatures (e.g., to 200 C or even 300 C), and operation in a radiation-rich environment (e.g., space).
The suitability of SiGe BiCMOS technology for extreme environment electronics applications is assessed in this work. The suitability of SiGe HBTs for use in high-temperature electronics applications is first investigated. SiGe HBTs are shown to exhibit sufficient current gain, frequency response, breakdown voltage, achieve acceptable device reliability, and improved low-frequency noise, at temperatures as high as 200-300 C. A comprehensive investigation of substrate bias effects on device performance, thermal properties, and reliability of vertical SiGe HBTs fabricated on CMOS-compatible, thin-film SOI, is presented. The impact of 63 MeV protons on these vertical SiGe HBTs fabricated on a CMOS-compatible SOI is then investigated. Proton irradiation creates G/R trap centers in SOI SiGe HBTs, creating positive charge at the buried oxide interface, effectively delaying the onset of the Kirk effect at high current density, which increases the frequency response of SOI SiGe HBTs following radiation. The thermodynamic stability of device-relevant epitaxial SiGe strained layers under proton irradiation is also investigated using x-ray diffraction techniques. Irradiation with 63 MeV protons is found to introduce no significant microdefects into the SiGe thin films, regardless of the starting stability condition of the SiGe film, and thus does not appear to be an issue for the use of SiGe HBT technology in emerging space systems. CMOS device reliability for emerging cryogenic space electronics applications is also assessed. CMOS device performance improves with cooling, however, CMOS device reliability becomes worse at decreased temperatures due to aggravated hot-carrier effects. The device lifetime is found to be a strong function of gate length, suggesting that design tradeoffs are inevitable.
| Identifer | oai:union.ndltd.org:GATECH/oai:smartech.gatech.edu:1853/7559 |
| Date | 28 November 2005 |
| Creators | Chen, Tianbing |
| Publisher | Georgia Institute of Technology |
| Source Sets | Georgia Tech Electronic Thesis and Dissertation Archive |
| Language | en_US |
| Detected Language | English |
| Type | Dissertation |
| Format | 2361734 bytes, application/pdf |
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