The increased power consumption and power density demands of modern technologies combined with the focus on global energy savings have increased the demands on DC/DC power supplies. DC/DC converters are ubiquitous in everyday life, found in products ranging from small handheld electronics requiring a few watts to warehouse sized server farms demanding over 50 megawatts. To improve efficiency and power density while reducing complexity and cost the modular building block approach is gaining popularity. These modular building blocks replace individually designed specialty power supplies, providing instead an optimized complete solution. To meet the demands for lower loss and higher power density, higher efficiency and higher frequency must be targeted in future designs. The objective of this dissertation is to explore and propose methods to improve the power density and performance of point of load modules ranging from 10 to 600W.
For non-isolated, low current point of load applications targeting outputs ranging from one to ten ampere, the use of a three level converter is proposed to improve efficiency and power density. The three level converter can reduce the voltage stress across the devices by a factor of two compared to the traditional buck; reducing switching losses, and allowing for the use of improved low voltage lateral and lateral trench devices. The three level can also significantly reduce the size of the inductor, facilitating 3D converter integration with a low profile magnetic by doubling the effective switching frequency and reducing the volt-second across the inductor. This work also proposes solutions for the drive circuit, startup, and flying capacitor balancing issues introduced by moving to the three level topology.
The emerging technology of gallium nitride can offer the ability to push the frequency of traditional buck converters to new levels. Silicon based semiconductors are a mature technology and the potential to further push frequency for improved power density is limited. GaN transistors are high electron mobility transistors offering a higher band gap, electron mobility, and electron velocity than Si devices. These material characteristics make the GaN device more suitable for higher frequency and voltage operation. This work will discuss the fundamentals of utilizing the GaN transistor in high frequency buck converter design; addressing the packaging of the GaN transistor, fundamental operating differences between GaN and Si devices, driving of GaN devices, and the impact of dead time on loss in the GaN buck converter. An analytical loss model for the GaN buck converter is also introduced.
With significant improvements in device technology and packaging, the circuit layout parasitics begins to limit the switching frequency and performance. This work will explore the design of a high frequency, high density 12V integrated buck converter, identifying the impact of parasitics on converter performance, propose design improvements to reduce critical parasitics, and assess the impact of frequency on passive integration. The final part of this research considers the thermal design of a high density 3D integrated module; this addresses the thermal limitations of standard PCB substrates for high power density designs and proposes the use of a direct bond copper (DBC) substrate to improve thermal performance in the module.
For 48V isolated applications, the current solutions are limited in frequency by high loss generated from the use of traditional topologies, devices, packaging, and transformer design. This dissertation considers the high frequency design of a highly efficient unregulated bus converter targeting intermediate bus architectures for use in telecom, networking, and high end computing applications. This work will explore the impact of switching frequency on transformer core volume, leakage inductance, and winding resistance. The use of distributed matrix transformers to reduce leakage inductance and winding resistance, improving high frequency transformer performance will be considered. A novel integrated matrix transformer structure is proposed to reduce core loss and core volume while maintaining low leakage inductance and winding resistance. Lastly, this work will push for higher frequency, higher efficiency, and higher power density with the use of low loss GaN devices. / Ph. D.
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/26920 |
| Date | 26 April 2012 |
| Creators | Reusch, David Clayton |
| Contributors | Electrical and Computer Engineering, Lee, Fred C., Lu, Guo-Quan, De La Ree, Jaime, Ngo, Khai D. T., Patil, Mayuresh J. |
| Publisher | Virginia Tech |
| Source Sets | Virginia Tech Theses and Dissertation |
| Detected Language | English |
| Type | Dissertation |
| Format | application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
| Relation | Reusch_4_15_12_Final.pdf |
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