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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Optimal Design of MHz LLC Converter for 48V Bus Converter Application

Cai, Yinsong 12 September 2019 (has links)
The intermediate bus architecture employing the 48V bus converter is one of the most popular power architecture. 48V to 12V bus converter has wide applications in telecommunications, networks, aerospace, and military, etc. However, today's state of the art products has low power rating or power density and becomes difficult to satisfy the demand of increasing power of the loads. To improve the current design, a GaN (Gallium Nitride) based two-stage solution is proposed for the bus converter. The first stage Buck converter regulates the 40V to 60V variable input to a fixed 36V bus voltage. The second stage LLC converter convert the 36V to 12V by a 3:1 transformer. The whole solution achieves the fixed frequency control. The thesis focus on the detail design and optimization of LLC converter, especially its transformer. To have high density and high efficiency, the transformer design becomes critical at MHz frequency. The matrix transformer concept is applied and a merged winding structure is used for flux cancellation, which effectively reduces the AC winding losses. A new fully interleaved termination and via design is proposed. It achieves significant reduction in loss and leakage flux. In addition, to study the current sharing of parallel winding layers, a 1-D analytic model is proposed and a symmetrical winding layer scheme is used to balance the current distribution. The hardware is built and tested. The proposed two-stage converter achieves the best performance compared to the current market. / Master of Science / Intermediate bus architecture (IBA) has wide applications in telecommunication, server and computing, and military power supplies. The intermediate bus converter (IBC) is the key stage in the IBA, where the DC bus voltage from the front-end power supply is converted to a lower intermediate bus voltage. Traditional IBC suffers from bulky magnetic components including inductors and transformers. This work illustrates the design and implementation of a two-stage IBC, where the first-stage Buck converter will provide regulation and the second stage LLC converter will provide isolation. Thanks to the soft-switching capability of LLC, the magnetic volume can be significantly reduced by raising the switching frequency of the converter. Therefore, planar magnetics can be used and placed directly inside of the printing circuit board (PCB), which allows for higher power densities and easy manufacturing of the magnetics and overall converter. However, as the frequency goes higher, the AC losses of the transformer caused by the eddy current, skin effect, and proximity effect become dominant. As a result, high-frequency transformer design becomes the key for the converter design. First, matrix transformer concept is applied to distribute the high current and reduce the conduction loss. Second, a novel merged winding structure is proposed for better transformer winding interleaving. Third, a new terminal structure of the transformer is proposed. Finally, the current sharing between parallel windings are modeled and studied. All the efforts result in great loss reduction. The prototype were verified and compared to the current converters that are on the market in the 48V – 12V area of IBCs.
2

Design and Implementation of a Multiphase Buck Converter for Front End 48V-12V Intermediate Bus Converters

Salvo, Christopher 25 July 2019 (has links)
The trend in isolated DC/DC bus converters is to increase the output power in the same brick form factors that have been used in the past. Traditional intermediate bus converters (IBCs) use silicon power metal oxide semiconductor field effect transistors (MOSFETs), which recently have reached the limit in terms of turn on resistance (RDSON) and switching frequency. In order to make the IBCs smaller, the switching frequency needs to be pushed higher, which will in turn shrink the magnetics, lowering the converter size, but increase the switching related losses, lowering the overall efficiency of the converter. Wide-bandgap semiconductor devices are becoming more popular in commercial products and gallium nitride (GaN) devices are able to push the switching frequency higher without sacrificing efficiency. GaN devices can shrink the size of the converter and provide better efficiency than its silicon counterpart provides. A survey of current IBCs was conducted in order to find a design point for efficiency and power density. A two-stage converter topology was explored, with a multiphase buck converter as the front end, followed by an LLC resonant converter. The multiphase buck converter provides regulation, while the LLC provides isolation. With the buck converter providing regulation, the switching frequency of the entire converter will be constant. A constant switching frequency allows for better electromagnetic interference (EMI) mitigation. This work includes the details to design and implement a hard-switched multiphase buck converter with planar magnetics using GaN devices. The efficiency includes both the buck efficiency and the overall efficiency of the two-stage converter including the LLC. The buck converter operates with 40V - 60V input, nominally 48V, and outputs 36V at 1 kW, which is the input to the LLC regulating 36V – 12V. Both open and closed loop was measured for the buck and the full converter. EMI performance was not measured or addressed in this work. / Master of Science / Traditional silicon devices are widely used in all power electronics applications today, however they have reached their limit in terms of size and performance. With the introduction of gallium nitride (GaN) field effect transistors (FETs), the limits of silicon can now be passed with GaN providing better performance. GaN devices can be switched at higher switching frequencies than silicon, which allows for the magnetics of power converters to be smaller. GaN devices can also achieve higher efficiency than silicon, so increasing the switching frequency will not hurt the overall efficiency of the power converter. GaN devices can handle higher switching frequencies and larger currents while maintaining the same or better efficiencies over their silicon counterparts. This work illustrates the design and implementation of GaN devices into a multiphase buck converter. This converter is the front end of a two-stage converter, where the buck will provide regulation and the second stage will provide isolation. With the use of higher switching frequencies, the magnetics can be decreased in size, meaning planar magnetics can be used in the power converter. Planar magnetics can be placed directly inside of the printing circuit board (PCB), which allows for higher power densities and easy manufacturing of the magnetics and overall converter. Finally, the open and closed loop were verified and compared to the current converters that are on the market in the 48V – 12V area of intermediate bus converters (IBCs).
3

High Frequency, High Power Density Integrated Point of Load and Bus Converters

Reusch, David Clayton 26 April 2012 (has links)
The increased power consumption and power density demands of modern technologies combined with the focus on global energy savings have increased the demands on DC/DC power supplies. DC/DC converters are ubiquitous in everyday life, found in products ranging from small handheld electronics requiring a few watts to warehouse sized server farms demanding over 50 megawatts. To improve efficiency and power density while reducing complexity and cost the modular building block approach is gaining popularity. These modular building blocks replace individually designed specialty power supplies, providing instead an optimized complete solution. To meet the demands for lower loss and higher power density, higher efficiency and higher frequency must be targeted in future designs. The objective of this dissertation is to explore and propose methods to improve the power density and performance of point of load modules ranging from 10 to 600W. For non-isolated, low current point of load applications targeting outputs ranging from one to ten ampere, the use of a three level converter is proposed to improve efficiency and power density. The three level converter can reduce the voltage stress across the devices by a factor of two compared to the traditional buck; reducing switching losses, and allowing for the use of improved low voltage lateral and lateral trench devices. The three level can also significantly reduce the size of the inductor, facilitating 3D converter integration with a low profile magnetic by doubling the effective switching frequency and reducing the volt-second across the inductor. This work also proposes solutions for the drive circuit, startup, and flying capacitor balancing issues introduced by moving to the three level topology. The emerging technology of gallium nitride can offer the ability to push the frequency of traditional buck converters to new levels. Silicon based semiconductors are a mature technology and the potential to further push frequency for improved power density is limited. GaN transistors are high electron mobility transistors offering a higher band gap, electron mobility, and electron velocity than Si devices. These material characteristics make the GaN device more suitable for higher frequency and voltage operation. This work will discuss the fundamentals of utilizing the GaN transistor in high frequency buck converter design; addressing the packaging of the GaN transistor, fundamental operating differences between GaN and Si devices, driving of GaN devices, and the impact of dead time on loss in the GaN buck converter. An analytical loss model for the GaN buck converter is also introduced. With significant improvements in device technology and packaging, the circuit layout parasitics begins to limit the switching frequency and performance. This work will explore the design of a high frequency, high density 12V integrated buck converter, identifying the impact of parasitics on converter performance, propose design improvements to reduce critical parasitics, and assess the impact of frequency on passive integration. The final part of this research considers the thermal design of a high density 3D integrated module; this addresses the thermal limitations of standard PCB substrates for high power density designs and proposes the use of a direct bond copper (DBC) substrate to improve thermal performance in the module. For 48V isolated applications, the current solutions are limited in frequency by high loss generated from the use of traditional topologies, devices, packaging, and transformer design. This dissertation considers the high frequency design of a highly efficient unregulated bus converter targeting intermediate bus architectures for use in telecom, networking, and high end computing applications. This work will explore the impact of switching frequency on transformer core volume, leakage inductance, and winding resistance. The use of distributed matrix transformers to reduce leakage inductance and winding resistance, improving high frequency transformer performance will be considered. A novel integrated matrix transformer structure is proposed to reduce core loss and core volume while maintaining low leakage inductance and winding resistance. Lastly, this work will push for higher frequency, higher efficiency, and higher power density with the use of low loss GaN devices. / Ph. D.
4

Smart Sensor Network System

Gen-Kuong, Fernando, Karolys, Alex 10 1900 (has links)
International Telemetering Conference Proceedings / October 27-30, 1997 / Riviera Hotel and Convention Center, Las Vegas, Nevada / This paper describes a Smart Sensor Network System for applications requiring sensors connected in a multidrop configuration in order to minimize interconnecting cables. The communication protocol was optimized for high speed data collection. The Smart Sensor Network System was developed with the following goals in mind: cost reduction, reliability and performance increase.

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