Return to search

Preemptive HW/SW-Threading by combining ESL methodology and coarse grained reconfiguration

Modern systems fulfil calculation tasks across the hardware- software boundary. Tasks are divided into coarse parallel subtasks that run on distributed resources. These resources are classified into a software (SW) and a hardware (HW) domain. The software domain usually contains processors for general purpose or digital signal calculations. Dedicated co-processors such as encryption or video en-/decoding units belong to the hardware domain. Nowadays, a decision in which domain a certain subtask will be executed in a system is usually taken during system level design. This is done on the basis of certain assumptions about the system requirements that might not hold at runtime. The HW/SW partitioning is static and cannot adapt to dynamically changing system requirements at runtime. Our contribution to tackle this, is to combine a ESL based HW/SW codesign methodology with a coarse grained reconfigurable System on Chip architecture. We propose this as Preemptive HW/SW-Threading.

Identiferoai:union.ndltd.org:DRESDEN/oai:qucosa.de:bsz:ch1-qucosa-130002
Date14 January 2014
CreatorsRößler, Marko, Heinkel, Ulrich
ContributorsTU-Chemnitz, Fakultät für Elektrotechnik und Informationstechnik
PublisherUniversitätsbibliothek Chemnitz
Source SetsHochschulschriftenserver (HSSS) der SLUB Dresden
LanguageEnglish
Detected LanguageEnglish
Typedoc-type:conferenceObject
Formatapplication/pdf, text/plain, application/zip
SourceReCoSoC '08: Proceedings of the International Conference on Reconfigurable Communication-centric SoCs

Page generated in 0.0022 seconds