A built-in self test (BIST) technique for single-event transient testing in digital circuits

Description

Thesis (M. S. in Electrical Engineering)--Vanderbilt University, Aug. 2008. / Title from title screen. Includes bibliographical references.

Links & Downloads

1. http://etd.library.vanderbilt.edu/ETD-db/available/etd-07292008-093802/

Tags

Integrated circuits Radiation hardening.

Additional Fields

Identifer	oai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/245089595
Date	January 2008
Creators	Balasubramanian, Anitha,
Source Sets	OCLC
Language	English
Detected Language	English
Type	Electronic dissertations.