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A List-based Low Power Scheduling Mechanism for Processor-in-Memory Systems

Power consumption is gradually becoming an important issue in designing computing systems. Most of the low power researches focused on semiconductor technique and hardware architecture design but less utilized the techniques of software optimization. In this thesis, list scheduling is employed to reduce the energy cost for the Processor-in-Memory system not at the sacrifice of execution performance. In our list-based low power scheduling algorithm, a priority list will be maintained for each scheduling step. The scheduling kernel utilizes the priority of mobility to determine which task will be scheduled to the suitable processor based on the energy cost model of energy-delay product. The experimental results are presented and discussed.

Identiferoai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0721103-172051
Date21 July 2003
CreatorsShu, Yu-Wen
ContributorsTsung-Chuan Huang, Chyi-Ren Dow, Tse-Sheng Chen, Slo-Li Chu, Ting-Wei Hou
PublisherNSYSU
Source SetsNSYSU Electronic Thesis and Dissertation Archive
LanguageCholon
Detected LanguageEnglish
Typetext
Formatapplication/pdf
Sourcehttp://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0721103-172051
Rightsunrestricted, Copyright information available at source archive

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