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Flip chip assembly process development, process characterization, and reliability assessment of polymer stud grid array-chip scaled package

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1. http://hdl.handle.net/1853/19141
2. 607325

Identifer	oai:union.ndltd.org:GATECH/oai:smartech.gatech.edu:1853/19141
Date	05 1900
Creators	Paydenkar, Chetan S.
Publisher	Georgia Institute of Technology
Source Sets	Georgia Tech Electronic Thesis and Dissertation Archive
Detected Language	English
Type	Thesis
Rights	Access restricted to authorized Georgia Tech users only.