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Flip chip assembly process development, process characterization, and reliability assessment of polymer stud grid array-chip scaled package

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Identiferoai:union.ndltd.org:GATECH/oai:smartech.gatech.edu:1853/19141
Date05 1900
CreatorsPaydenkar, Chetan S.
PublisherGeorgia Institute of Technology
Source SetsGeorgia Tech Electronic Thesis and Dissertation Archive
Detected LanguageEnglish
TypeThesis
RightsAccess restricted to authorized Georgia Tech users only.

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