The accurate simulation of wireless channels is important since it permits the realistic and repeatable performance measurement of wireless systems. While software simulation is a flexible method for testing hardware models, its long-running simulation time can be prohibitive in many scenarios. Prior to the availability of accurate and standardized channel models, wireless products needed to be verified using extensive and expensive field testing. A far less costly approach is to model the behavior of radio channels on a hardware simulator.
Different channel characteristics should be considered to ensure the faithful simulation of wireless propagation. Among the most important characteristics are the path-loss behavior, Doppler frequency, delay distribution, fading distribution, and time, frequency, and space correlation between fading samples across different antennas. Various fading channel models have been proposed for propagation modeling in different scenarios. A good homogeneous field programmable gate array (FPGA) fading simulator needs to accurately reproduce the propagation effects, yet it also needs to be compact and fast to be effectively used for rapid hardware prototyping and simulation.
In this thesis, new channel models are proposed for the compact FPGA implementation of fading channel simulators with accurate statistics. Compact hardware implementations for physical and analytical fading channel models are proposed that can simulate fading channels with more than one thousand paths on a single FPGA. We also propose design techniques for accurate and compact statistical fading channel simulation of isotropic and non-isotropic scattering in Rayleigh, Rician, Nakagami-m, and Weibull fading channels. Compact FPGA implementations are presented for multiple-antenna fading simulators for geometric one-ring models, two-ring models, elliptical models, and analytical models including the i.i.d. model, and Kronecker, Weichselberger, and VCR channel models. Finally, a fading simulation and bit error performance evaluation platform is proposed for the rapid baseband prototyping and verification of single- and multiple-antenna wireless systems.
| Identifer | oai:union.ndltd.org:LACETR/oai:collectionscanada.gc.ca:AEU.10048/631 |
| Date | 11 1900 |
| Creators | Fouladi Fard, Saeed |
| Contributors | Cockburn, Bruce (Electrical and Computer Engineering), Schlegel, Christian (Computing Science), Gaudet, Vincent (Electrical and Computer Engineering), Vorobyov, Sergiy (Electrical and Computer Engineering), MacGregor, Mike (Computing Science), Wilton, Steven (Electrical and Computer Engineering, University of British Colombia) |
| Source Sets | Library and Archives Canada ETDs Repository / Centre d'archives des thèses électroniques de Bibliothèque et Archives Canada |
| Language | English |
| Detected Language | English |
| Type | Thesis |
| Format | 9292882 bytes, application/pdf |
| Relation | S. Fouladi Fard, A. Alimohammad, B. F. Cockburn, and C. Schlegel, A flexible FPGA-based MIMO geometric fading channel simulator for rapid prototyping, in Proceedings of the International Conference on Field-Programmable Technology (to appear), 2009., S. Fouladi Fard, A. Alimohammad, B. F. Cockburn, and C. Schlegel, A versatile fading simulator for on-chip verification of MIMO communication systems, in Proceedings of the IEEE International System on Chip Conference (to appear), 2009., S. Fouladi Fard, A. Alimohammad, B. F. Cockburn, and C. Schlegel, High path-count multirate Rayleigh fading channel simulator with time-multiplexed datapath, in Proceedings of the IEEE International System on Chip Conference (to appear), 2009., S. Fouladi Fard, A. Alimohammad, B. F. Cockburn, and C. Schlegel, A single FPGA filter-based multipath emulator, in Proceedings of the IEEE Global Communications Conference (to appear), 2009. |
Page generated in 0.0018 seconds