The first topic of this thesis is a C-less and R-less ASK (Amplitude Shift Keying) demodulator design for wireless implantable devices. Lots of prior ASK demodulators were composed of one or more capacitors which might be integrated in a chip or positioned off-chip on a PCB (Printed Circuit Board). The capacitor increases the area of the implantable system regardless of on-chip or off-chip, which violates the small-scale requirement for implanted
applications. Thus, this work proposes a miniature ASK demodulator without any passive elements, i.e., R or C. The noise margin of the envelope detector in the C-less ASK demodulator is enlarged such that any Schmitt trigger or current limiting resistor is no longer needed. It results in the number of transistors required for the ASK demodulator circuit is reduced to 12.
The second topic of this thesis is a design of a low-power 2-dimensional bypassing multiplier. The proposed bypassing cells constituting the multiplier skip redundant signal transitions when the horizontally (row) partial product or the vertically (column) operand is zero. Thorough post-layout simulations show that the power dissipation of the proposed design is reduced by more than 41% compared to the prior design with obscure penalty of delay and area.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0712107-172907 |
| Date | 12 July 2007 |
| Creators | Ciou, Yan-Jhih |
| Contributors | Sying-Jyan Wang, Chua-Chin Wang, Jih-Ching Chiu, Ing-Jer Huang |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | Cholon |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0712107-172907 |
| Rights | not_available, Copyright information available at source archive |
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