This thesis presents a bio-signal recording system with offset cancellation and a low power comparator. The recording of bio-signal requires high-gain amplification before recording, to match the input to the range of the analog to digital converter (ADC); interference could be a problem if it causes the amplifier to reach saturation, leaving the recording inoperable (i.e., blank) until it returns to its normal state. The proposed system can monitor the amplifier output, and reset the amplifier output to a point near the center of its dynamic range before the amplifier output leaves its dynamic range. The proposed system provides discrete compensation voltages to cancel the offset voltage, and thereby avoids the shortcomings of conventional filters.
Furthermore, a low power and low offset voltage comparator for low current operation is proposed. It is suitable for the clock controller in a sampled bio-signal acquisition system. The measured current consumption of the comparator is less than 130 nA, and the offset voltage is 2 mV.
The proposed recording system and comparator have been implemented in the TSMC (Taiwan Semiconductor Manufacturing Company) 0.35£gm 2P4M CMOS process technology to verify the simulation results as well as the correctness of the proposed architecture.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0811108-181220 |
| Date | 11 August 2008 |
| Creators | Pan, Yen-Yow |
| Contributors | Jia-Jin Chen, Robert Rieger, Chua-Chin Wang, Ya-Hsin Hsueh |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | English |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0811108-181220 |
| Rights | not_available, Copyright information available at source archive |
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