Semiconductor technology has already got into nanometer scale. As the dimension keeping scale down, we can get more transistor in the same area, and furthermore the frequency and performance are also enhanced. But nowadays the development of the lithography technology has come to the neck, we must find the other way to improve the performance of transistor. In this study, the strained silicon effect and reliability of CMOS are fully discussed.
In order to get strain from the channel, silicon substrate is bent by applying external mechanical stress, the lattice of channel will have strain due to uniaxial tensile stress. By this way, we successfully improve drain current and mobility of NMOS into 12% and 6%, respectively. But there is no variation for PMOS.
In addition, by DC stress, we can understand the hot carrier effect to strained silicon. In this work, both NMOS and PMOS present the same result, this is, as the silicon substrate is bent, the sharper of the curve, the worse of the reliability.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0804105-144104 |
| Date | 04 August 2005 |
| Creators | Kuo, Yuan-jui |
| Contributors | Cheng-tang Pan, Shin-pon Ju, Ting-chang Chang, Chien-hsiang Chao |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | Cholon |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0804105-144104 |
| Rights | not_available, Copyright information available at source archive |
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