<p>Since the discovery of graphene, two-dimensional (2D) materials have attracted broad interests for transistor applications due to their atomically thin nature. This thesis studies nano-transistors based on 2D materials for several novel applications, including tunneling transistors for low-power electronics and reconfigurable transistors for hardware security.</p><p>The first part of the thesis focuses on tunneling field-effect transistors (TFETs). Since the current injection in a conventional MOSFET depends on thermionic injection over a gate-controlled barrier, the subthreshold swing (SS) of MOSFET is fundamentally limited to 60 mV/dec at room temperature, hindering the supply voltage scaling of integrated circuits (ICs). Utilizing band-to-band tunneling (BTBT) as current injection mechanism, TFETs overcome the SS limit by filtering out the Fermi tail in the source and achieve steep-slope switching. However, existing demonstrations of TFETs are plagued by low on-currents and degraded SS, largely due to the large tunneling distances caused by non-scaled body thicknesses, making 2D materials a promising candidate as channel materials for TFETs. In this thesis, we demonstrate a prototype TFET based on black phosphorus (BP) adopting electrostatic doping that is tuned by multiple top-gates, which allows the device to be reconfigured into multiple operation modes. The band-to-band tunneling mechanism is further confirmed by source-doping-dependent and temperature-dependent measurements, and the performance improvement of BP TFETs with further body and oxide thicknesses scaling is projected by atomistic simulation. In addition, a vertical BP TFET with a large tunneling area is also demonstrated, and negative differential resistance (NDR) is observed in the device.</p><p>The second part of the thesis focuses on reconfigurable nano-transistors with tunable p- and n-type operations and the implementation of hardware security based on such transistors. Polymorphic gate has been proposed as a hardware security primitive to protect the intellectual property of ICs from reverse engineering, and its operation requires transistors that can be reconfigured between p-type and n-type. However, a traditional CMOS transistor relies on substitutional doping, and thus its polarity cannot be altered after the fabrication. By contrast, 2D nano-transistors can attain both electron and hole injections. In this thesis, we review the Schottky-barrier injection in 2D transistors and demonstrate the feasibility of achieving complementary p-type and n-type transistors using BP as channel material by adopting metal contacts with different work functions. In this design, however, the discrepancy in the p-FET and n-FET device structures makes it unsuitable for reconfigurable transistors. Therefore, we continue to modify the device design to enable reconfigurable p-type and n-type operations in the same BP transistor. Finally, a NAND/NOR polymorphic gate is experimentally demonstrated based on the reconfigurable BP transistors, showing the feasibility of using 2D materials to enable hardware security.</p><p>In the last part, we demonstrate an artificial sub-60 mV/dec switching in a metal-insulator-metal-insulator-semiconductor (MIMIS) transistor. Negative capacitance FETs (NC-FETs) have attracted wide interest as promising candidates for steep-slope devices. However, the detailed mechanisms of the observed steep-slope switching are under intense debate. We show that sub-60 mV/dec switching can be observed in a WS2 transistor with an MIMIS structure – without any ferroelectric component. Using a resistor-capacitor (RC) network model, we show that the observed steep-slope switching can be attributed to the internal gate voltage response to the chosen varying gate voltage scan rates. Our results indicate that the measurement-related artefacts can lead to observation of sub-60 mV/dec switching and that experimentalists need to critically assess their measurement setups.</p>
| Identifer | oai:union.ndltd.org:purdue.edu/oai:figshare.com:article/17003818 |
| Date | 22 November 2021 |
| Creators | Peng Wu (11691256) |
| Source Sets | Purdue University |
| Detected Language | English |
| Type | Text, Thesis |
| Rights | CC BY 4.0 |
| Relation | https://figshare.com/articles/thesis/TWO-DIMENSIONAL_NANO-TRANSISTORS_FOR_STEEP-SLOPE_DEVICES_AND_HARDWARE_SECURITY/17003818 |
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