International Telemetering Conference Proceedings / October 25-28, 1999 / Riviera Hotel and Convention Center, Las Vegas, Nevada / L-3 Communications Telemetry & Instrumentation (L-3 T&I) has developed an advanced
IBM PC-AT Telemetry, Tracking, and Commanding (TT&C) SATCOM system based on
the utilization of Field Programmable Gate Array / Digital Signal Processing (FPGA/DSP)
microprocessors. This system includes up-link, down-link, and range processing sections.
Physically, the system consists of one IF Transceiver and two or more FPGA/DSP
microprocessor boards called Advanced Processing Microprocessors (APMs). The form
factor of these PWBs is compliant with full length, full height IBM PC PCI bus cards. This
paper describes the features and functionality of an advanced Telemetry, Tracking, and
Commanding Processing System (TT&CPS) based on the implementation of FPGA and
DSP microprocessors.
The high-level functional attributes of the TT&CPS are depicted in Figure 1. There are
four main functional blocks: the IF Transceiver, the Down-Link Processing Section, the
Up-Link Processing Section, and the Range Processor. The analog/IF circuitry in the IF
Transceiver card interfaces between the 68–72 MHz (70 MHz, nominal) IF I/O signals and
the Up-Link and Down-Link Processing Section's DSP equipment. The down-link portion
of the IF Transceiver card has two user-selected input ports. From the selected input, the
signal is processed through selectable bandwidth limiting, gain control, Doppler correction
(optional), quadrature down-conversion to zero hertz (baseband), selectable baseband
filtering, and precision Analog-to-Digital (A/D) conversion. The up-link portion of the IF
Transceiver card takes I/Q digital data from the APM performing the up-link processing
functions. This baseband I/Q digital data is Digital-to-Analog (D/A) converted, filtered,
quadrature up-converted to 68–72 MHz, up-link Doppler corrected (optional), output level
detected and level controlled, and sent to a two-position output selector switch. The down-link portion of the TT&CPS provides main carrier linear PM or BPSK or QPSK
demodulation and can also, in composite linear PM demodulation mode, receive and
demodulate FSK and/or BPSK subcarriers and ranging signals. The demodulators use
symbol timing loops and bit decision circuits (matched filters) to perform the bit
synchronization function. Several decoding algorithms, including differential, de-interleaving,
Viterbi, and Reed-Solomon, are available for the down-link telemetry.
Command format checking and CRC status is also available on FSK-demodulated data.
Direct carrier BPSK/QPSK demodulation has decoding and frame synchronization
capabilities. Because of the modular construction of the firmware and the use of FPGAs
and DSPs, the system can be loaded with only the functions in use, lowering initial setup
time while increasing overall system capability. To support a particular function, the card
is downloaded with an “image,” which programs the FPGAs and DSPs at initialization.
The user can change configurations by simply downloading a new set of instructions to the
FPGA/DSP on the fly to keep the ground station running with minimal downtime. The
flexibility of the design minimizes spare board costs, while achieving greater
programmability at the end-user location.
| Identifer | oai:union.ndltd.org:arizona.edu/oai:arizona.openrepository.com:10150/606819 |
| Date | 10 1900 |
| Creators | Meyers, Tom |
| Contributors | L-3 Communications Telemetry & Instrumentation |
| Publisher | International Foundation for Telemetering |
| Source Sets | University of Arizona |
| Language | en_US |
| Detected Language | English |
| Type | text, Proceedings |
| Rights | Copyright © International Foundation for Telemetering |
| Relation | http://www.telemetry.org/ |
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