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Vme Slave Implementation On Fpga

In today&rsquo / s complex technological systems, there is a need of multi tasking several
units running in accordance. Each unit is composed of several intelligent
microcontroller cards. Each intelligent card performs a different task that the unit is
responsible of. For this reason, there is a need of common communication bus
between these cards in order to accomplish the task duties. VME (Versa Module
Euro-Card) bus is a well known, the most reliable and the commonly used
communication bus, even if it was standardized three decades ago. In this thesis
work, the world wide accepted VME parallel bus protocol is implemented on FPGA
(Field programmable Gate Array). The implementation covers the VME standard
slave protocols. The VME Slave Module has been developed by VHDL (Very high
level Hardware Description Language). The simulations have been carried over a
computer based environment. After the verification of the VHDL code, an
Intellectual Property (IP) core is synthesized and loaded into the FPGA. The FPGA
based printed circuit board has been designed and the IP core&rsquo / s function has been
tested by bus protocol checkers for all of its functionality. The designed hardware
has several standard serial communication ports, such as / USB, UART and I2C.
Through the developed card and the add-on units, it is also possible to communicate
with these serial ports over the VME bus.

Identiferoai:union.ndltd.org:METU/oai:etd.lib.metu.edu.tr:http://etd.lib.metu.edu.tr/upload/2/12610128/index.pdf
Date01 November 2008
CreatorsZorer, Tolga
ContributorsAskar, Murat
PublisherMETU
Source SetsMiddle East Technical Univ.
LanguageEnglish
Detected LanguageEnglish
TypeM.S. Thesis
Formattext/pdf
RightsTo liberate the content for METU campus

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