In an increasingly digital world, the need for high speed and high fidelity analog-to-digital (A/D) converters is paramount. Performance improvements in electronic A/Ds have not kept pace with demand, hence the need to consider alternative technologies. One such technology is photonics, as it takes advantage of optical sampling, high speed optical switches and low cross-talk interconnects. Optical sampling derives its advantage from the application of ultra low timing jitter (<100fs) mode locked lasers utilised to provide high speed clock pulses. In this thesis the feasibility and simulated performance of three different types of photonic oversampled A/D converters was investigated. The first, and simplest design is that of oversampled pulse-code-modulation (PCM), where a 2-level photonic comparator is used to sample the analog input at a frequency much greater than the Nyquist frequency. Subsequent low pass filtering produces a digital representation of the input. The other two architectures that were investigated are the first-order sigma-delta and error diffusion, which add one level of error correction to the PCM technique. These two architectures require the functional elements of a subtractor, comparator and delay. The photonic comparator and subtractor functionality was provided by Self-Electro-Optic Effect devices (SEED) based upon multiple quantum well (MQW) p-i-n devices. To facilitate calculation of the performance of the different architectures and aid in device design, a simulation of SEED operation based upon experimental data was developed. The simulation’s accuracy was demonstrated by agreement with the results from experimental S-SEED switching and optical subtraction. To emphasize the utility of the model, the simulation was subsequently used to demonstrate tristability of an S-SEED and critical slowing down in a bistable S-SEED. These effects were experimentally verified. To provide enhanced comparator contrast ratio and subtractor dynamic range, resonantly enhanced microcavity multiple quantum well (MQW) p-i-n devices were designed and grown by MOCVD. The operation of the subtractor and comparator was experimentally demonstrated and utilising temperature tuning, optimised performance was achieved with devices from the same wafer. Furthermore, the inclusion of gain was shown to improve the subtractor performance to that demanded by the sigma-delta. The constraints on each architecture imposed by the unipolar nature of the light intensity were derived and the sigma delta architecture was shown to be superior to the error diffusion for a photonic implementation. Using the numerical simulation based upon experimentally derived data, the entire sigma delta architecture was simulated to calculate the expected performance. The signal-to-quantisation-noise ratio (SQNR) was calculated as a function input amplitude and a peak SQNR of 54dB was obtained for an oversampling ratio of 100. / http://library.adelaide.edu.au/cgi-bin/Pwebrecon.cgi?BBID=1283979 / Thesis (Ph.D.) -- University of Adelaide, School of Chemistry and Physics, 2007
| Identifer | oai:union.ndltd.org:ADTP/264360 |
| Date | January 2007 |
| Creators | Clare, Bradley |
| Source Sets | Australiasian Digital Theses Program |
| Language | en_US |
| Detected Language | English |
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