Return to search

On the modular design of analog on-chip buffer for circuit testing application

When designing analog circuits, we must ultimately perform measurements on the fabricated chips to determine whether they work correctly or not. The test results are compared with simulation results to determine what the differences to the expected results are. Therefore, incremental improvement and redesign becomes possible. We can obtain highly important information from the test results, making circuit testing a very important aspect of the process of analog circuit design. Especially, measurements during the development phase may include internal circuit nodes which will not be accessible in a final design but are pinned out specifically in the development phase.
Because the probing tools present capacitive loads to the circuit, these additional loads may affect the analog circuits‟ response, especially in a high frequency range. Therefore, decreasing influence of capacitive loads of the probing tools in the testing environment is very important. We use analog buffers to separate the analog circuit node from the probing tools. Therefore, the buffer becomes a very important block in analog circuit testing [1-3].
For adapting to different testing environments, this thesis examines three different types of buffer which are designed using a partially modular method [4, 5]. All buffers provide a DC to 1 MHz bandwidth. The first buffer module provides a -1.3 V~1.3 V signal range driving 25 pf~85 pf capacitive loads; the second buffer has a -0.8 V~0.8 V range with for 5 pf~25 pf loads; the third buffer yields -0.5 V~0.5 V range with 1 pf~5 pf loads. The circuit design is discussed and simulated results are presented. Finally, measured results are reported for an open-loop output stage with near unity gain (buffer three). This circuit was previously fabricated in 0.35 £gm CMOS technology.

Identiferoai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0831111-223251
Date31 August 2011
CreatorsLiao, Jiun-Huei
ContributorsRobert Rieger, Jih-ching Chiu, Tsang-Ling Sheu, Chung-Yao Kao
PublisherNSYSU
Source SetsNSYSU Electronic Thesis and Dissertation Archive
LanguageEnglish
Detected LanguageEnglish
Typetext
Formatapplication/pdf
Sourcehttp://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0831111-223251
Rightsuser_define, Copyright information available at source archive

Page generated in 0.0376 seconds