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Inversion of Vandermonde Matrices in FPGAs / Invertering av Vandermondematriser i FPGA

In this thesis, we explore different algorithms for the inversion of Vandermonde matrices and the corresponding suitable architectures for implement in FPGA. The inversion of Vandermonde matrix is one of the three master projects of the topic, Implementation of a digital error correction algorithm for time-interleaved analog-to-digital converters. The project is divided into two major parts: algorithm comparison and optimization for inversion of Vandermonde matrix; architecture selection for implementation. A CORDIC algorithm for sine and cosine and Newton-Raphson based division are implemented as functional blocks.

Identiferoai:union.ndltd.org:UPSALLA1/oai:DiVA.org:liu-2648
Date January 2004
CreatorsHu, ShiQiang, Yan, Qingxin
PublisherLinköpings universitet, Institutionen för systemteknik, Linköpings universitet, Institutionen för systemteknik, Institutionen för systemteknik
Source SetsDiVA Archive at Upsalla University
LanguageEnglish
Detected LanguageEnglish
TypeStudent thesis, info:eu-repo/semantics/bachelorThesis, text
Formatapplication/pdf
Rightsinfo:eu-repo/semantics/openAccess
RelationLiTH-ISY-Ex, ; 3695

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