Conventional gm-c filters have limited voltage swings in low voltage operation. CMOS companding filters replace gm-c filters in low voltage environment for high dynamic range. The square-root domain filter and log-domain filter belongs to this companding filter category.
In this thesis, a second order low pass square root domain filter (SRD filter) based on the up-down TL (translinear loop) circuit structure is presented. The SRD filter consists of four geometric-mean cells and three squarer/divider cells. The advantages of the proposed circuits are low supply voltage, low power consumption, high bandwidth, and low total harmonic distortion (THD).
The circuit has been fabricated with 0.35£gm CMOS technology. It operates with a supply voltage of 1.5V, and the bias current varies from 0.5£gA to 30£gA. Measurement results show that the cutoff frequency can be tuned from 3.12MHz to 8.11MHz when the Capacitance (C) is 5pF.The total harmonic distortion is 0.28%, and the power consumption is 1.09mW.
Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0724109-164017 |
Date | 24 July 2009 |
Creators | Lai, Jui-chi |
Contributors | Ko-Chi Kuo, Chia-Hsiung Kao, Tzyy-Sheng Horng |
Publisher | NSYSU |
Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
Language | English |
Detected Language | English |
Type | text |
Format | application/pdf |
Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0724109-164017 |
Rights | not_available, Copyright information available at source archive |
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