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Strömsnål FM-demodulering med FPGA / Low power FM demodulation using an FPGA

Rutiner skrivna i Verilog har utvecklats för avkodning av en frekvensmodulerad signal givet ett Analog Devices AD9874-chip. Olika metoder för I/Q-demodulation har utvärderats och av dessa har CORDIC valts och implementerats i Verilog. Koden har till viss del testats på en IGLOO nano-FPGA men framförallt simulerats och verifierats i ModelSim. / Routines written in Verilog have been developed to perform I/Q-demodulation of a frequency modulated signal given valuesfrom a Analog Devices AD9874 chip. Different methods for I/Q-demodulation have been evaluated and among theseCORDIC has been chosen and implemented in Verilog. The code has to some extent been tested on a IGLOO nano FPGA but foremost been simulated and verified in ModelSim.

Identiferoai:union.ndltd.org:UPSALLA1/oai:DiVA.org:liu-70263
Date January 2011
CreatorsLindström, Gustaf
PublisherLinköpings universitet, Elektroniksystem
Source SetsDiVA Archive at Upsalla University
LanguageSwedish
Detected LanguageSwedish
TypeStudent thesis, info:eu-repo/semantics/bachelorThesis, text
Formatapplication/pdf
Rightsinfo:eu-repo/semantics/openAccess

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