An ISM-band frequency synthesizer is introduced in this thesis. The technique allows digital phase/frequency modulation to be achieved in a closed phase locked loop (PLL) without mixers and D/As. According to the simulation results using ADS, quantization noise will be filtered by the PLL bandwidth. But the data rate is also bounded by the PLL bandwidth. Two key components of this closed-loop architecture, Gaussian filter and delta-sigma modulator have been implemented by FPGA together with the Qualcomm Q3236 synthesizer IC.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0704101-225111 |
| Date | 04 July 2001 |
| Creators | Chen, Hsing-Hung |
| Contributors | Sheng-Fuh Chang, Tzong-Lin Wu, Huey-Ru Chuang, Tzyy-Sheng Horng |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | Cholon |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704101-225111 |
| Rights | unrestricted, Copyright information available at source archive |
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