With the digital systems moving towards higher frequencies, lower operating voltages and higher power, supplying the required current at the right voltage and at the right time to facilitate timely switching of the CMOS circuits becomes increasingly challenging. The board level power supply cannot meet these requirements directly due to the high inductance of the package interconnections. To overcome this problem, several thin film decoupling capacitors have to be placed on the IC or close to the IC in the package. Two approaches were pursued for high-k thin film decoupling capacitors.
1) Low cost sol-gel based thin film capacitors on organic board compatible Cu-foils
2) RF-sputtered thin film capacitors on silicon substrate for silicon compatible processes
While sol-gel provides cost effective technology, sputtered ferroelectric devices are more compatible from manufacturing stand point with the existing technology. Nano-crystalline barium titanate and barium strontium titanate film capacitor devices were fabricated and characterized for organic and silicon substrates respectively.
Sol-gel barium titanate films were fabricated first on a bare Cu-foil and then transferred to organic board through a standard lamination process. With process optimization and film doping, a capacitance density of 3 µF/cm2 was demonstrated with breakdown voltage greater than 12V. Leakage current characteristics, breakdown voltages, and electrical reliability of the devices were significantly improved through doping of the barium titanate films and modified film chemistry. Films and interfaces were characterized with high resolution electron microscopy, SEM, XRD, and DC leakage measurements.
RF sputtering was selected for ferroelectric thin film integration on silicon substrate. Barium strontium titanate (BST) films were deposited on various electrodes sputtered on silicon substrates. The main focus was to improve interface stabilities for high-k thin films on Si to yield large-area defect-free devices. Effect of bottom electrode selection and barrier layers on device yield and performance were investigated carefully. High yield and high device performance was observed for certain electrode and barrier layer combination. A capacitance density up to 1 µF/cm2 was demonstrated with a breakdown voltage above 15 V on large area, 7 mm2, devices.
These two techniques can potentially meet mid-high frequency future decoupling requirements.
| Identifer | oai:union.ndltd.org:GATECH/oai:smartech.gatech.edu:1853/26655 |
| Date | 20 November 2008 |
| Creators | Kumar, Manish |
| Publisher | Georgia Institute of Technology |
| Source Sets | Georgia Tech Electronic Thesis and Dissertation Archive |
| Detected Language | English |
| Type | Thesis |
Page generated in 0.0093 seconds