Return to search

Cost Beneficial Solution for High Rate Data Processing

International Telemetering Conference Proceedings / October 25-28, 1999 / Riviera Hotel and Convention Center, Las Vegas, Nevada / GSFC in keeping with the tenets of NASA has been aggressively investigating new
technologies for spacecraft and ground communications and processing. The application
of these technologies, together with standardized telemetry formats, make it possible to
build systems that provide high-performance at low cost in a short development cycle.
The High Rate Telemetry Acquisition System (HRTAS) Prototype is one such effort that
has validated Goddard's push towards faster, better and cheaper. The HRTAS system
architecture is based on the Peripheral Component Interconnect (PCI) bus and VLSI
Application-Specific Integrated Circuits (ASICs). These ASICs perform frame
synchronization, bit-transition density decoding, cyclic redundancy code (CRC) error
checking, Reed-Solomon error detection/correction, data unit sorting, packet extraction,
annotation and other service processing. This processing in performed at rates of up to
and greater than 150 Mbps sustained using a high-end performance workstation running
standard UNIX O/S, (DEC 4100 with DEC UNIX or better). ASICs are also used for the
digital reception of Intermediate Frequency (IF) telemetry as well as the spacecraft
command interface for commands and data simulations.
To improve the efficiency of the back-end processing, the level zero processing sorting
element is being developed. This will provide a complete hardware solution to extracting
and sorting source data units and making these available in separate files on a remote disk
system. Research is on going to extend this development to higher levels of the science
data processing pipeline. The fact that level 1 and higher processing is instrument
dependent; an acceleration approach utilizing ASICs is not feasible. The advent of field
programmable gate array (FPGA) based computing, referred to as adaptive or reconfigurable computing, provides a processing performance close to ASIC levels while
maintaining much of the programmability of traditional microprocessor based systems.
This adaptive computing paradigm has been successfully demonstrated and its cost
performance validated, to make it a viable technology for the level one and higher
processing element for the HRTAS.
Higher levels of processing are defined as the extraction of useful information from
source telemetry data. This information has to be made available to the science data user
in a very short period of time. This paper will describe this low cost solution for high rate
data processing at level one and higher processing levels. The paper will further discuss
the cost-benefit of this technology in terms of cost, schedule, reliability and performance.

Identiferoai:union.ndltd.org:arizona.edu/oai:arizona.openrepository.com:10150/606836
Date10 1900
CreatorsMirchandani, Chandru, Fisher, David, Ghuman, Parminder
ContributorsLockheed-Martin Space Mission Systems, Stinger Ghaffarian Technologies, NASA
PublisherInternational Foundation for Telemetering
Source SetsUniversity of Arizona
Languageen_US
Detected LanguageEnglish
Typetext, Proceedings
RightsCopyright © International Foundation for Telemetering
Relationhttp://www.telemetry.org/

Page generated in 0.0017 seconds