System-on-Chip is increasingly built using ASIP(Application Specific Instruction set Processor) due to the flexibility and efficiency obtained from ASIPs. NoGAP (Novel Generator of Accelerator and Processor framework) is an innovative approach for ASIP design, which provides the advantage of both ADL (Architecture Description Language) and HDL (Hardware Description Language) to the designer. For the processors designed using NoGAP, software tools need to be automatically generated, to aid the designer in programming and verifying the processor. As part of the master thesis work, we have developed two generators namely Assembler generator and Cycle-Accurate Simulator generator for NoGAP using C++. The Assembler generator automatically generates an assembler, which is used to convert the assembly code written by a programmer into relocatable binary code. The Cycle-Accurate Simulator generator automatically generates a cycle-accurate simulator to model the behavior of the designed processor. Both these generators are static, and can be used to generate the tools for any processor created using NoGAP. In this report, we have detailed the concepts behind the generators,and the implementation details of the generators. We have listed the results obtained from running assembler and cycle-accurate simulator on a test processor created using NoGAP. / NoGAP
| Identifer | oai:union.ndltd.org:UPSALLA1/oai:DiVA.org:liu-56999 |
| Date | January 2010 |
| Creators | Akhlaq, Faisal, Loganathan, Sumathi |
| Publisher | Linköpings universitet, Institutionen för datavetenskap, Linköpings universitet, Institutionen för datavetenskap |
| Source Sets | DiVA Archive at Upsalla University |
| Language | English |
| Detected Language | English |
| Type | Student thesis, info:eu-repo/semantics/masterThesis, text |
| Format | application/pdf |
| Rights | info:eu-repo/semantics/openAccess |
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