Master’s thesis deals with design of rail-to-rail second generation current conveyor in CMOS technology. Describes principles of function of different generations of current conveyors, as well as the basic principle of design of second generation current conveyor based on operational amplifier. Addresses circuit topology of input rail-to-rail stage and class AB output stage. The objective of this thesis is to design, characterize performance and create layout of second generation current conveyor with input common mode voltage rail-to-rail capability in ONSemi I3T25 technology.
| Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:242143 |
| Date | January 2016 |
| Creators | Hudzik, Martin |
| Contributors | Kledrowetz, Vilém, Prokop, Roman |
| Publisher | Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií |
| Source Sets | Czech ETDs |
| Language | Czech |
| Detected Language | English |
| Type | info:eu-repo/semantics/masterThesis |
| Rights | info:eu-repo/semantics/restrictedAccess |
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